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* [CodeGen] Combine concat_vector of trunc'd scalar to scalar_to_vector.Ahmed Bougacha2015-04-091-0/+2
| | | | | | | | | | | | | | We already do: concat_vectors(scalar, undef) -> scalar_to_vector(scalar) When the scalar is legal. When it's not, but is a truncated legal scalar, we can also do: concat_vectors(trunc(scalar), undef) -> scalar_to_vector(scalar) Which is equivalent, since the upper lanes are undef anyway. While there, teach the combine to look at more than 2 operands. Differential Revision: http://reviews.llvm.org/D8883 llvm-svn: 234530
* [AArch64] Prefer UZP for concat_vector of illegal truncs.Ahmed Bougacha2015-03-211-6/+16
| | | | | | Follow-up to r232459: prefer a UZP shuffle to the intermediate truncs. llvm-svn: 232871
* [AArch64] Use intermediate step for concat_vectors of illegal truncs.Ahmed Bougacha2015-03-171-0/+31
Optimize concat_vectors of truncated vectors, where the intermediate type is illegal, to avoid said illegality, e.g., (v4i16 (concat_vectors (v2i16 (truncate (v2i64))), (v2i16 (truncate (v2i64))))) -> (v4i16 (truncate (v4i32 (concat_vectors (v2i32 (truncate (v2i64))), (v2i32 (truncate (v2i64))))))) This isn't really target-specific, and, as such, would best go in the DAGCombiner. However, ISD::TRUNCATE legality isn't keyed on both input and result type, so we might generate worse code when we don't know better. On AArch64 we know it's fine for v2i64->v4i16 and v4i32->v8i8. rdar://20022387 llvm-svn: 232459
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