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path: root/llvm/test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll
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* AArch64: add missing Apple CPU names and use them by default.Tim Northover2020-01-081-0/+1
* [clang][llvm] Obsolete Exynos M1 and M2Evandro Menezes2019-10-301-1/+0
* [AArch64] Do 64-bit vector move of 0 and -1 by extracting from the 128-bit moveJohn Brawn2018-10-251-4/+4
* [AArch64] Split zero cycle feature more granularlyEvandro Menezes2018-09-281-34/+168
* [AArch64] Don't materialize 0 with "fmov h0, .." when FullFP16 is not supportedSjoerd Meijer2018-02-081-5/+8
* [AArch64] Expand testing of zero cycle zeroingEvandro Menezes2018-01-301-34/+29
* AArch64: fix one more place movi.2d could be created.Tim Northover2017-12-201-0/+9
* AArch64: work around how Cyclone handles "movi.2d vD, #0".Tim Northover2017-12-181-6/+6
* [AArch64] Update the feature set for Qualcomm's Falkor CPU.Chad Rosier2017-01-041-0/+7
* [AArch64] Set FMOVS0 and FMOVD0 as isAsCheapAsAMove when needed.Haicheng Wu2016-07-121-4/+4
* [Kryo] Enable ZCZeroing featureHaicheng Wu2016-07-121-22/+30
* AArch64: Change modeling of zero cycle zeroing.Matthias Braun2016-07-061-0/+26
* AArch64: allow MOV (imm) alias to be printedTim Northover2016-06-161-4/+4
* AArch64/ARM64: move ARM64 into AArch64's placeTim Northover2014-05-241-0/+49
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