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bcm5719-llvm
meklort-10.0.0
meklort-10.0.1
ortega-7.0.1
Project Ortega BCM5719 LLVM
Raptor Computing Systems
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path:
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llvm
/
test
/
CodeGen
/
AArch64
/
addsub-shifted.ll
Commit message (
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Author
Age
Files
Lines
*
[AArch64][GlobalISel] Select patterns which use shifted register operands
Jessica Paquette
2019-08-20
1
-1
/
+40
*
[opaque pointer type] Add textual IR support for explicit type parameter to l...
David Blaikie
2015-02-27
1
-10
/
+10
*
AArch64: Make test more robust.
Matthias Braun
2015-02-05
1
-4
/
+10
*
AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.
Tim Northover
2014-05-24
1
-1
/
+0
*
TableGen: fix operand counting for aliases
Tim Northover
2014-05-16
1
-18
/
+10
*
TableGen: use PrintMethods to print more aliases
Tim Northover
2014-05-12
1
-10
/
+18
*
ARM64: specify full triple in tests to pacify Windows.
Tim Northover
2014-04-14
1
-1
/
+1
*
ARM64: optimise (cmp x, (sub 0, y)) to (cmn x, y).
Tim Northover
2014-04-14
1
-0
/
+1
*
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging....
Stephen Lin
2013-07-13
1
-5
/
+5
*
Add explicit triples to AArch64 tests
Tim Northover
2013-02-01
1
-1
/
+1
*
Add AArch64 as an experimental target.
Tim Northover
2013-01-31
1
-0
/
+295