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path: root/llvm/test/CodeGen/AArch64/O3-pipeline.ll
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* [CodeGen] Move fentry-insert, xray-instrumentation and patchable-function bef...Fangrui Song2020-01-241-3/+3
* [PGO][PGSO] Instrument the code gen / target passes.Hiroshi Yamauchi2019-12-091-1/+9
* Revert "[PGO][PGSO] Instrument the code gen / target passes."Hiroshi Yamauchi2019-12-061-9/+1
* [PGO][PGSO] Instrument the code gen / target passes.Hiroshi Yamauchi2019-12-061-1/+9
* [AArch64] Move the branch relaxation pass after BTI insertionMomchil Velikov2019-11-061-1/+1
* [LegacyPM] Fix pass structure dumpingevgeny2019-11-011-1/+2
* Reapply r374743 with a fix for the ocaml bindingJoerg Sonnenberger2019-10-141-0/+1
* Revert "Add a pass to lower is.constant and objectsize intrinsics"Dmitri Gribenko2019-10-141-1/+0
* Add a pass to lower is.constant and objectsize intrinsicsJoerg Sonnenberger2019-10-131-0/+1
* [Dominators][CodeGen] Don't mark MachineDominatorTree as preserved in Machine...Jakub Kuderski2019-10-011-0/+1
* [Dominators][CodeGen] Add MachinePostDominatorTree verificationJakub Kuderski2019-10-011-0/+1
* Revert "Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen...Dmitri Gribenko2019-09-101-0/+4
* Reland "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into op...Clement Courbet2019-09-101-4/+0
* MemTag: unchecked load/store optimization.Evgeniy Stepanov2019-08-301-0/+1
* MemTag: stack initializer merging.Evgeniy Stepanov2019-08-191-0/+2
* [MachineCSE][MachinePRE] Avoid hoisting code from code regions into hot BBs.Kai Luo2019-07-191-1/+1
* Basic MTE stack tagging instrumentation.Evgeniy Stepanov2019-07-171-0/+1
* Revert "r364412 [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into op...Clement Courbet2019-06-261-0/+4
* [ExpandMemCmp][MergeICmps] Move passes out of CodeGen into opt pipeline.Clement Courbet2019-06-261-4/+0
* Rename ExpandISelPseudo->FinalizeISel, delay register reservationMatt Arsenault2019-06-191-1/+1
* Introduce control flow speculation tracking pass for AArch64Kristof Beyls2018-12-181-0/+1
* [AArch64] Re-run load/store optimizer after aggressive tail duplicationAlexandros Lamprineas2018-12-171-0/+1
* Subject: [PATCH] [CodeGen] Add pass to combine interleaved loads.Martin Elshuber2018-11-191-0/+5
* AArch64: add a pass to compress jump-table entries when possible.Tim Northover2018-10-241-0/+1
* [AArch64][v8.5A] Branch Target Identification code-generation passOliver Stannard2018-10-081-0/+1
* Re-submitting changes in D51550 because it failed to patch.Christy Lee2018-09-241-0/+2
* Recommit "Enable MachineOutliner by default under -Oz for AArch64"Jessica Paquette2018-07-271-0/+2
* Revert "Enable MachineOutliner by default under -Oz for AArch64"Jessica Paquette2018-07-271-2/+0
* Enable MachineOutliner by default under -Oz for AArch64Jessica Paquette2018-07-271-0/+2
* [ShrinkWrap] Add optimization remarks to the shrink-wrapping passFrancis Visoiu Mistrih2018-06-051-1/+1
* Remove MachineLoopInfo dependency from AsmPrinter.Michael Zolotukhin2018-04-091-2/+0
* State that CFG is preserved in 'Falkor HW Prefetch Fix Late Phase'.Michael Zolotukhin2018-03-221-2/+0
* Reapply "[test] Add tests for llc passes pipelines." with a fix for bots with...Michael Zolotukhin2018-03-221-0/+171
* Revert "[test] Add tests for llc passes pipelines."Jonas Devlieghere2018-03-221-170/+0
* [test] Add tests for llc passes pipelines.Michael Zolotukhin2018-03-211-0/+170
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