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* [AMDGPU] fix readlane/readfirstlane src vgpr operand type.Valery Pykhtin2016-04-071-2/+2
| | | | | | | | | For VGPR_32 operand disassembler expects a VGPR register encoded as 0..255 (enum8 src operand). readfirstlane/readline actually has enum9 operand and this change fixes VGPR_32 to VS_32 (enum9 encoding). Differential Revision: http://reviews.llvm.org/D18696 llvm-svn: 265670
* [GCC] Attribute ifunc support in llvmDmitry Polukhin2016-04-0710-19/+130
| | | | | | | | | | | This patch add support for GCC attribute((ifunc("resolver"))) for targets that use ELF as object file format. In general ifunc is a special kind of function alias with type @gnu_indirect_function. Patch for Clang http://reviews.llvm.org/D15524 Differential Revision: http://reviews.llvm.org/D15525 llvm-svn: 265667
* InlineSpiller.cpp: Escap \@ in r265547. [-Wdocumentation]NAKAMURA Takumi2016-04-071-1/+1
| | | | llvm-svn: 265657
* Make helper functions static. NFC.Benjamin Kramer2016-04-072-15/+11
| | | | llvm-svn: 265653
* [X86][SSE] Add support for VZEXT constant foldingSimon Pilgrim2016-04-071-0/+18
| | | | llvm-svn: 265646
* [BlockPlacement] Remove an unnecessary continueAmaury Sechet2016-04-071-1/+0
| | | | | | NFC. llvm-svn: 265643
* [MBP] Remove an unused function parameterAmaury Sechet2016-04-071-5/+3
| | | | | | NFC. llvm-svn: 265642
* Fix the sanitizer bootstrap error in r265547.Wei Mi2016-04-071-1/+8
| | | | | | | | | The iterators of SmallPtrSet SpillsInSubTreeMap[Child].first may be invalidated when SpillsInSubTreeMap grows. Rearrange the code to ensure the grow of SpillsInSubTreeMap only happens before getting the iterators of the SmallPtrSet. llvm-svn: 265639
* Revert "[BlockPlacement] Remove an unnecessary continue" and "[MBP] Remove ↵Amaury Sechet2016-04-071-3/+6
| | | | | | an unused function parameter" llvm-svn: 265638
* Revert "ValueMapper: Make LocalAsMetadata match function-local Values"Duncan P. N. Exon Smith2016-04-071-38/+16
| | | | | | | | | | | This reverts commit r265631, since it caused bot failures: http://lab.llvm.org:8011/builders/clang-ppc64be-linux/builds/3256 http://lab.llvm.org:8011/builders/clang-cmake-aarch64-42vma/builds/7272 Looks like something is depending on the old behaviour. I'll try to track it down and recommit. llvm-svn: 265637
* [X86] Reuse EFLAGS and form LOCKed ops when only user is SETCC.Ahmed Bougacha2016-04-071-15/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Re-apply r265450 which caused PR27245 and was reverted in r265559 because of a wrong generalization: the fetch_and_add->add_and_fetch combine only works in specific, but pretty common, cases: (icmp slt x, 0) -> (icmp sle (add x, 1), 0) (icmp sge x, 0) -> (icmp sgt (add x, 1), 0) (icmp sle x, 0) -> (icmp slt (sub x, 1), 0) (icmp sgt x, 0) -> (icmp sge (sub x, 1), 0) Original Message: We only generate LOCKed versions of add/sub when the result is unused. It often happens that the result is used, but only by a comparison. We can optimize those out by reusing EFLAGS, which lets us use the proper instructions, instead of having to fallback to LXADD. Instead of doing this as an MI peephole (as we do for the other non-LOCKed (really, non-MR) forms), do it in ISel. It becomes quite tricky later. This also makes it eventually possible to stop expanding and/or/xor if the only user is an icmp (also see D18141). This uses the LOCK ISD opcodes added by r262244. Differential Revision: http://reviews.llvm.org/D17633 llvm-svn: 265636
* ValueMapper: Allow RF_IgnoreMissingLocals and RF_NullMapMissingGlobalValuesDuncan P. N. Exon Smith2016-04-071-7/+1
| | | | | | | | | Remove the assertion that disallowed the combination, since RF_IgnoreMissingLocals should have no effect on globals. As it happens, RF_NullMapMissingGlobalValues asserted in MapValue(Constant*,...), so I also changed a cast to a cast_or_null to get my test passing. llvm-svn: 265633
* ValueMapper: Make LocalAsMetadata match function-local ValuesDuncan P. N. Exon Smith2016-04-071-16/+38
| | | | | | | | | | | | | Start treating LocalAsMetadata similarly to function-local members of the Value hierarchy in MapValue and MapMetadata. - Don't memoize them. - Return nullptr if they are missing. This also cleans up ConstantAsMetadata to stop listening to the RF_IgnoreMissingLocals flag. llvm-svn: 265631
* [AArch64] Teach RegisterBankInfo about the CC register bank.Quentin Colombet2016-04-072-0/+12
| | | | | | We need to cover each register class with a register bank. llvm-svn: 265629
* IR: RF_IgnoreMissingValues => RF_IgnoreMissingLocals, NFCDuncan P. N. Exon Smith2016-04-079-15/+25
| | | | | | | | | | | | | | | | | | | | | | | Clarify what this RemapFlag actually means. - Change the flag name to match its intended behaviour. - Clearly document that it's not supposed to affect globals. - Add a host of FIXMEs to indicate how to fix the behaviour to match the intent of the flag. RF_IgnoreMissingLocals should only affect the behaviour of RemapInstruction for function-local operands; namely, for operands of type Argument, Instruction, and BasicBlock. Currently, it is *only* passed into RemapInstruction calls (and the transitive MapValue calls that it makes). When I split Metadata from Value I didn't understand the flag, and I used it in a bunch of places for "global" metadata. This commit doesn't have any functionality change, but prepares to cleanup MapMetadata and MapValue. llvm-svn: 265628
* [AArch64] Teach RegisterBankInfo about the mapping of register classesQuentin Colombet2016-04-072-0/+50
| | | | | | on register banks. llvm-svn: 265626
* Follow-up for r265605: don't mutate vector we're iterating.Michael Zolotukhin2016-04-071-4/+6
| | | | llvm-svn: 265625
* [RegisterBankInfo] Implement a target independent version ofQuentin Colombet2016-04-071-1/+40
| | | | | | | | | | | getInstrMapping. This implementation requires that the target implemented getRegBankFromRegClass. Indeed, the implementation uses the register classes for the encoding constraints for the instructions to deduce the mapping of a value. llvm-svn: 265624
* Re-commit r265039 "[X86] Merge adjacent stack adjustments in ↵Hans Wennborg2016-04-071-14/+34
| | | | | | | | | | | | | | | | eliminateCallFramePseudoInstr (PR27140)" Third time's the charm? The previous attempt (r265345) caused ASan test failures on X86, as broken CFI caused stack traces to not work. This version of the patch makes sure not to merge with stack adjustments that have CFI, and to not add merged instructions' offests to the CFI about to be generated. This is already covered by the lit tests; I just got the expectations wrong previously. llvm-svn: 265623
* [RegisterBankInfo] Add an helper function to get the size of a register.Quentin Colombet2016-04-061-8/+34
| | | | | | | The previous method to get the size was too simple and could fail for physical registers. llvm-svn: 265620
* Fix a race condition in support library ThreadPool.Justin Lebar2016-04-061-1/+4
| | | | | | | | | | | | | | | By running TSAN on the ThreadPool unit tests it was discovered that the threads in the pool can pop tasks off the queue at the same time the "wait" routine is trying to check if the task queue is empty. This patch fixes this problem by checking for active threads in the waiter before checking whether the queue is empty. Patch by Jason Henline. Differential Revision: http://reviews.llvm.org/D18811 Reviewers: joker.eph, jlebar llvm-svn: 265618
* [sancov] enabling coverage edge pruning by default.Mike Aizatsky2016-04-061-4/+4
| | | | | | Differential Revision: http://reviews.llvm.org/D18844 llvm-svn: 265615
* Fix the compare-clang diff error introduced by r265547.Wei Mi2016-04-061-1/+2
| | | | | | | Use MapVector instead of DenseMap for MergeableSpillsMap so it will be iterated in determined order. llvm-svn: 265610
* [llvm-c] Add LLVMGetValueKind.Peter Zotov2016-04-061-0/+11
| | | | | | | | Patch by Nicole Mazzuca <npmazzuca@gmail.com>. Differential Revision: http://reviews.llvm.org/D18729 llvm-svn: 265608
* Thread Expected<...> up from createMachOObjectFile() to allow llvm-objdump ↵Kevin Enderby2016-04-0613-42/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | to produce a real error message Produce the first specific error message for a malformed Mach-O file describing the problem instead of the generic message for object_error::parse_failed of "Invalid data was encountered while parsing the file”.  Many more good error messages will follow after this first one. This is built on Lang Hames’ great work of adding the ’Error' class for structured error handling and threading Error through MachOObjectFile construction. And making createMachOObjectFile return Expected<...> . So to to get the error to the llvm-obdump tool, I changed the stack of these methods to also return Expected<...> : object::ObjectFile::createObjectFile() object::SymbolicFile::createSymbolicFile() object::createBinary() Then finally in ParseInputMachO() in MachODump.cpp the error can be reported and the specific error message can be printed in llvm-objdump and can be seen in the existing test case for the existing malformed binary but with the updated error message. Converting these interfaces to Expected<> from ErrorOr<> does involve touching a number of places. To contain the changes for now use of errorToErrorCode() and errorOrToExpected() are used where the callers are yet to be converted. Also there some were bugs in the existing code that did not deal with the old ErrorOr<> return values. So now with Expected<> since they must be checked and the error handled, I added a TODO and a comment: “// TODO: Actually report errors helpfully” and a call something like consumeError(ObjOrErr.takeError()) so the buggy code will not crash since needed to deal with the Error. Note there is one fix also needed to lld/COFF/InputFiles.cpp that goes along with this that I will commit right after this. So expect lld not to built after this commit and before the next one. llvm-svn: 265606
* [LoopUnroll] Fix the way we update DT after complete unrolling.Michael Zolotukhin2016-04-061-10/+15
| | | | | | | | Updating dominators for exit-blocks of the unrolled loops is not enough, as shown in PR27157. The proper way is to update dominators for all dominance-children of original loop blocks. llvm-svn: 265605
* [RegisterBankInfo] Add methods to get the possible mapping of an instruction ↵Quentin Colombet2016-04-061-0/+33
| | | | | | | | | | | | | | | | | | | | | | | on a register bank. This will be used by the register bank select pass to assign register banks for generic virtual registers. This was originally committed as r265573 but broke at least one windows bot. The problem with the windows bot was that it was using a copy constructor for the InstructionMappings class and could not synthesize it. Actually, the fact that this class is not copy constructable is expected and the compiler should use the move assignment constructor. Marking the problematic assignment explicitly as using the move constructor has its own problems. Indeed, with recent clang we get a warning that we may prevent the elision of the copy by the compiler. A proper fix for both compilers would be to change the API of getPossibleInstrMapping to take a InstructionMappings as input/output parameter. This does not feel natural and since GISel is not used on windows yet, I chose to workaround the problem by not compiling the problematic code on windows. llvm-svn: 265604
* NFC: make AtomicOrdering an enum classJF Bastien2016-04-0632-265/+284
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: In the context of http://wg21.link/lwg2445 C++ uses the concept of 'stronger' ordering but doesn't define it properly. This should be fixed in C++17 barring a small question that's still open. The code currently plays fast and loose with the AtomicOrdering enum. Using an enum class is one step towards tightening things. I later also want to tighten related enums, such as clang's AtomicOrderingKind (which should be shared with LLVM as a 'C++ ABI' enum). This change touches a few lines of code which can be improved later, I'd like to keep it as NFC for now as it's already quite complex. I have related changes for clang. As a follow-up I'll add: bool operator<(AtomicOrdering, AtomicOrdering) = delete; bool operator>(AtomicOrdering, AtomicOrdering) = delete; bool operator<=(AtomicOrdering, AtomicOrdering) = delete; bool operator>=(AtomicOrdering, AtomicOrdering) = delete; This is separate so that clang and LLVM changes don't need to be in sync. Reviewers: jyknight, reames Subscribers: jyknight, llvm-commits Differential Revision: http://reviews.llvm.org/D18775 llvm-svn: 265602
* [MBP] Remove an unused function parameterHaicheng Wu2016-04-061-5/+3
| | | | | | NFC. llvm-svn: 265596
* [PPC] Use VSX/FP Facility integer load when an integer load's only users are ↵Ehsan Amiri2016-04-061-1/+26
| | | | | | | | | | | conversion to FP http://reviews.llvm.org/D18405 When the integer value loaded is never used directly as integer we should use VSX or Floating Point Facility integer loads and avoid extra direct move llvm-svn: 265593
* Put quotes around #error string.James Y Knight2016-04-061-1/+1
| | | | | | | GCC reports "missing terminating ' character", even when it's being skipped by preprocessing. llvm-svn: 265590
* AMDGPU: Add a shader calling conventionNicolai Haehnle2016-04-0623-87/+97
| | | | | | | | | | | This makes it possible to distinguish between mesa shaders and other kernels even in the presence of compute shaders. Patch By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Differential Revision: http://reviews.llvm.org/D18559 llvm-svn: 265589
* Revert "[RegisterBankInfo] Add methods to get the possible mapping of anQuentin Colombet2016-04-061-46/+8
| | | | | | | | | | | instruction on a register bank. This will be used by the register bank select pass to assign register banks for generic virtual registers." and the follow-on commits while I find out a way to fix the win7 bot: http://lab.llvm.org:8011/builders/sanitizer-windows/builds/19882 This reverts commit r265578, r265581, r265584, and r265585. llvm-svn: 265587
* [IRVerifier] Don't crash on invalid DIFile inside DISubprogram.Davide Italiano2016-04-061-0/+2
| | | | | | | r265515, this time with the correct fix. file inside DISubprogram is not mandatory. llvm-svn: 265586
* [gold] Save bitcode for module partitions (save-temps + split codegen).Evgeniy Stepanov2016-04-062-13/+20
| | | | llvm-svn: 265583
* [RegisterBankInfo] Provide a default constructor for InstructionMappingQuentin Colombet2016-04-061-0/+1
| | | | | | | | | helper class. The default constructor creates invalid (isValid() == false) instances and may be used to communicate that a mapping was not found. llvm-svn: 265581
* [IRVerifier] Prefer dyn_cast<> over isa<> + cast<>.Davide Italiano2016-04-061-9/+8
| | | | | | Thanks to Rafael for the suggestion! llvm-svn: 265579
* [RegisterBankInfo] Add an helper function to get the size of a register.Quentin Colombet2016-04-061-8/+34
| | | | | | | The previous method to get the size was too simple and could fail for physical registers. llvm-svn: 265578
* IR: Use DenseSet instead of DenseMap for ConstantUniqueMap; NFCDuncan P. N. Exon Smith2016-04-062-43/+20
| | | | | | | | | | | | | | | | | | Use a DenseSet instead of a DenseMap for constants in LLVMContextImpl. Last time I looked at this was some time before r223588, when DenseSet<V> had no advantage over DenseMap<V,char>. After r223588, there's a 50% memory savings. This is all mechanical. There were little bits of missing API from DenseSet so I added the trivial implementations: - iterator::operator++(int) - template <class LookupKeyT> insert_as(ValueTy, LookupKeyT) There should be no functionality change, just reduced memory consumption (this wasn't on a profile or anything; just a cleanup I stumbled on). llvm-svn: 265577
* IR: Stop explicitly clearing the MDStringCacheDuncan P. N. Exon Smith2016-04-061-3/+0
| | | | | | | The MDStringCache doesn't need to be explicitly cleared before destruction. The destructor handles it at least as efficiently. llvm-svn: 265576
* [RegisterBankInfo] Add methods to get the possible mapping of an instruction ↵Quentin Colombet2016-04-061-0/+11
| | | | | | | | | on a register bank. This will be used by the register bank select pass to assign register banks for generic virtual registers. llvm-svn: 265573
* [AArch64] Change the CMake to avoid to build GlobalISel related APIsQuentin Colombet2016-04-062-18/+12
| | | | | | | | | | when GISel is not built. The positive side effects are: - We do not have to define dummy implementation - We do not have to do weird gymnastic to avoid like issues (like missing constructor or vtable for the base classes) llvm-svn: 265570
* [AArch64] Teach the subtarget how to get to the RegisterBankInfo.Quentin Colombet2016-04-064-6/+80
| | | | | | | | | | | Rework the access to GlobalISel APIs to contain how much of the APIs we need to access for the final executable to build when GlobalISel is not built. This prevents massive usage of ifdefs in various places. Now, all the GlobalISel ifdefs will be happing only in AArch64TargetMachine.cpp. llvm-svn: 265567
* [RegisterBankInfo] Implement the verify method of the InstructionMapping ↵Quentin Colombet2016-04-061-0/+25
| | | | | | | | helper class. This checks that all the register operands get a proper mapping. llvm-svn: 265563
* Loop Unroll: add options and tweak to make Partial unrolling more usefulFiona Glaser2016-04-061-3/+20
| | | | | | | | | | | | | | | | 1. Add FullUnrollMaxCount option that works like MaxCount, but also limits the unroll count for fully unrolled loops. So if a loop has an iteration count over this, it won't fully unroll. 2. Add CLI options for MaxCount and the new option, so they can be tested (plus a test). 3. Make partial unrolling obey MaxCount. An example use-case (the out of tree one this is originally designed for) is a target’s TTI can analyze a loop and decide on a max unroll count separate from the size threshold, e.g. based on register pressure, then constrain LoopUnroll to not exceed that, regardless of the size of the unrolled loop. llvm-svn: 265562
* Revert r265450 "[X86] Reuse EFLAGS and form LOCKed ops when only user is SETCC."Hans Wennborg2016-04-061-76/+15
| | | | | | It caused ASan 32-bit tests to hang (PR27245). llvm-svn: 265559
* LoopUnroll: only allow non-modulo Partial unrolling when Runtime=trueFiona Glaser2016-04-061-2/+4
| | | | | | Patch by Evgeny Stupachenko <evstupac@gmail.com>. llvm-svn: 265558
* [RegisterBankInfo] Implement the verify method for the ValueMapping helper ↵Quentin Colombet2016-04-061-4/+16
| | | | | | | | | class. The method checks that the value is fully defined accross the different partial mappings and that the partial mappings are compatible between each other. llvm-svn: 265556
* [RegisterBankInfo] Add a verify method for the PartialMapping helper class.Quentin Colombet2016-04-061-0/+19
| | | | | | | This verifies that the PartialMapping can be accomadated into the related register bank. llvm-svn: 265555
* [RegisterBankInfo] Add a couple of helper classes for the future cost model.Quentin Colombet2016-04-061-0/+31
| | | | llvm-svn: 265553
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