| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | fix PR9523, a crash in looprotate on a non-canonical loop made out of ↵ | Chris Lattner | 2011-04-09 | 1 | -1/+5 |
| | | | | | | | indirectbr. llvm-svn: 129203 | ||||
| * | Fix a bug where RecursivelyDeleteTriviallyDeadInstructions could | Chris Lattner | 2011-04-09 | 1 | -3/+18 |
| | | | | | | | | delete the instruction pointed to by CGP's current instruction iterator, leading to a crash on the testcase. This fixes PR9578. llvm-svn: 129200 | ||||
| * | Avoid excess precision issues that lead to generating host-compiler-specific ↵ | Chris Lattner | 2011-04-09 | 1 | -2/+6 |
| | | | | | | | | | code. Switch lowering probably shouldn't be using FP for this. This resolves PR9581. llvm-svn: 129199 | ||||
| * | PR9604; try to deal with RAUW updates correctly in the AST. I'm not convinced | Eli Friedman | 2011-04-09 | 1 | -0/+4 |
| | | | | | | | | it's completely safe to cache the AST across LICM runs even with this fix, but this fix can't hurt. llvm-svn: 129198 | ||||
| * | regexes are allowed to match empty things, e.g. {{.*}} in filecheck. | Chris Lattner | 2011-04-09 | 1 | -1/+1 |
| | | | | | llvm-svn: 129193 | ||||
| * | Build the Hopfield network incrementally when splitting global live ranges. | Jakob Stoklund Olesen | 2011-04-09 | 6 | -84/+176 |
| | | | | | | | | | | It is common for large live ranges to have few basic blocks with register uses and many live-through blocks without any uses. This approach grows the Hopfield network incrementally around the use blocks, completely avoiding checking interference for some through blocks. llvm-svn: 129188 | ||||
| * | Precompute interference for neighbor blocks as long as there is no interference. | Jakob Stoklund Olesen | 2011-04-09 | 2 | -22/+37 |
| | | | | | | | This doesn't require seeking in the live interval union, so it is very cheap. llvm-svn: 129187 | ||||
| * | have dag combine zap "store undef", which can be formed during call lowering | Chris Lattner | 2011-04-09 | 1 | -2/+8 |
| | | | | | | | with undef arguments. llvm-svn: 129185 | ||||
| * | Redirected errors from the AsmParser to the proper | Sean Callanan | 2011-04-09 | 1 | -0/+10 |
| | | | | | | | | | | error stream, in cases where the AsmParser is being invoked by EDDisassembler. Before, they were being sent to errs() because no error handler was installed in the SourceMgr. llvm-svn: 129177 | ||||
| * | Simplify array bound checks and clarify comments. One element array can ↵ | Devang Patel | 2011-04-08 | 1 | -10/+7 |
| | | | | | | | have same non-zero number as lower bound as well as upper bound. llvm-svn: 129170 | ||||
| * | Add a function for profiling to run at shutdown. Unlike the existing API, this | Nick Lewycky | 2011-04-08 | 2 | -3/+40 |
| | | | | | | | | can be used even when main() isn't present in the Module, but it means that you don't get to read argv[]. llvm-svn: 129163 | ||||
| * | Fix an apparent typo that made GCC complain | Matt Beaumont-Gay | 2011-04-08 | 1 | -1/+1 |
| | | | | | llvm-svn: 129160 | ||||
| * | Do not emit DW_AT_upper_bound and DW_AT_lower_bound for unbouded array. | Devang Patel | 2011-04-08 | 1 | -3/+15 |
| | | | | | | | | | If lower bound is more then upper bound then consider it is an unbounded array. An array is unbounded if non-zero lower bound is same as upper bound. If lower bound and upper bound are zero than array has one element. llvm-svn: 129156 | ||||
| * | Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap ↵ | Evan Cheng | 2011-04-08 | 3 | -25/+27 |
| | | | | | | | is lowered into a call to the specified trap function at sdisel time. llvm-svn: 129152 | ||||
| * | Workaround g++ 4.2.1 warning diagnostic false positive. | Jim Grosbach | 2011-04-08 | 1 | -2/+2 |
| | | | | | llvm-svn: 129149 | ||||
| * | Check opcoe (dmb, dsb) instead of bitfields matching. | Johnny Chen | 2011-04-08 | 1 | -12/+1 |
| | | | | | llvm-svn: 129148 | ||||
| * | Hanlde the checking of bad regs for SMMLAR properly, instead of asserting. | Johnny Chen | 2011-04-08 | 1 | -9/+10 |
| | | | | | | | | PR9650 rdar://problem/9257565 llvm-svn: 129147 | ||||
| * | Sanity check the option operand for DMB/DSB. | Johnny Chen | 2011-04-08 | 2 | -8/+29 |
| | | | | | | | | PR9648 rdar://problem/9257634 llvm-svn: 129146 | ||||
| * | Mark hasExtraDefRegAllocReq=1 on LDRD. | Jim Grosbach | 2011-04-08 | 1 | -1/+5 |
| | | | | | | | | | | The previous cleanup of LDRD got overzealous and removed it, causing post-RA scheduling to get overzealous in breaking antidependencies and invalidate these instructions. Hilarity and invalid assembly ensued. rdar://9244161 llvm-svn: 129144 | ||||
| * | Refactor MCJIT 32-bit section loading. | Jim Grosbach | 2011-04-08 | 2 | -82/+67 |
| | | | | | | | | Teach 32-bit section loading to use the Memory Manager interface, just like the 64-bit loading does. Tidy up a few other things here and there. llvm-svn: 129138 | ||||
| * | llvm.global_[cd]tor is defined to be either external, or appending with an array | Nick Lewycky | 2011-04-08 | 4 | -37/+33 |
| | | | | | | | | of { i32, void ()* }. Teach the verifier to verify that, deleting copies of checks strewn about. llvm-svn: 129128 | ||||
| * | Add sanity checking for bad register specifier(s) for the DPFrm instructions. | Johnny Chen | 2011-04-08 | 1 | -0/+30 |
| | | | | | | | Add more test cases to exercise the logical branches related to the above change. llvm-svn: 129117 | ||||
| * | Micro optimization and improved similarity with gas' output: | Rafael Espindola | 2011-04-07 | 1 | -10/+38 |
| | | | | | | | When two section names share a suffix, reuse the entry in shstrtab. llvm-svn: 129115 | ||||
| * | Do not let debug info interfer with branch folding. | Devang Patel | 2011-04-07 | 1 | -0/+6 |
| | | | | | llvm-svn: 129114 | ||||
| * | Replace the old algorithm that emitted the "print the alias for an instruction" | Bill Wendling | 2011-04-07 | 4 | -5/+22 |
| | | | | | | | | | | | | | | with the newer, cleaner model. It uses the IAPrinter class to hold the information that is needed to match an instruction with its alias. This also takes into account the available features of the platform. There is one bit of ugliness. The way the logic determines if a pattern is unique is O(N**2), which is gross. But in reality, the number of items it's checking against isn't large. So while it's N**2, it shouldn't be a massive time sink. llvm-svn: 129110 | ||||
| * | Add option to emit @llvm.trap as a function call instead of a trap ↵ | Evan Cheng | 2011-04-07 | 1 | -1/+23 |
| | | | | | | | instruction. rdar://9249183. llvm-svn: 129107 | ||||
| * | Add support for .skip. | Rafael Espindola | 2011-04-07 | 1 | -1/+1 |
| | | | | | | | | Patch by Roman Divacky. Fixes PR9361. llvm-svn: 129106 | ||||
| * | Fix indentation. | Akira Hatanaka | 2011-04-07 | 1 | -2/+2 |
| | | | | | llvm-svn: 129105 | ||||
| * | Update ATUsed every time after expandRegLargeImmPair is called. | Akira Hatanaka | 2011-04-07 | 1 | -4/+8 |
| | | | | | llvm-svn: 129104 | ||||
| * | Fixed encoding for VEXTqf | Mon P Wang | 2011-04-07 | 1 | -2/+2 |
| | | | | | llvm-svn: 129101 | ||||
| * | Added a check in the preRA scheduler for potential interference on a | Andrew Trick | 2011-04-07 | 3 | -4/+107 |
| | | | | | | | | | | induction variable. The preRA scheduler is unaware of induction vars, so we look for potential "virtual register cycles" instead. Fixes <rdar://problem/8946719> Bad scheduling prevents coalescing llvm-svn: 129100 | ||||
| * | Fix handling of functions with internal linkage. | Akira Hatanaka | 2011-04-07 | 1 | -8/+27 |
| | | | | | llvm-svn: 129099 | ||||
| * | Add sanity checking for invalid register encodings for signed/unsigned ↵ | Johnny Chen | 2011-04-07 | 1 | -0/+5 |
| | | | | | | | | | extend instructions. Add some test cases. llvm-svn: 129098 | ||||
| * | Add sanity checking for invalid register encodings for saturating instructions. | Johnny Chen | 2011-04-07 | 1 | -0/+5 |
| | | | | | llvm-svn: 129096 | ||||
| * | Recompute hasPHIKill flags when shrinking live intervals. | Jakob Stoklund Olesen | 2011-04-07 | 1 | -1/+3 |
| | | | | | | | PHI values may be deleted, causing the flags to be wrong. This fixes PR9616. llvm-svn: 129092 | ||||
| * | Add some more comments about checkings of invalid register numbers. | Johnny Chen | 2011-04-07 | 1 | -0/+5 |
| | | | | | | | And two test cases. llvm-svn: 129090 | ||||
| * | Expose more passes to the C API. | Rafael Espindola | 2011-04-07 | 1 | -0/+16 |
| | | | | | llvm-svn: 129087 | ||||
| * | Avoid moving iterators when the previous block was just visited. | Jakob Stoklund Olesen | 2011-04-07 | 1 | -8/+13 |
| | | | | | llvm-svn: 129081 | ||||
| * | Prefer multiplications to divisions. | Jakob Stoklund Olesen | 2011-04-07 | 1 | -7/+13 |
| | | | | | llvm-svn: 129080 | ||||
| * | Extract SpillPlacement::addLinks for handling the special transparent blocks. | Jakob Stoklund Olesen | 2011-04-07 | 3 | -37/+49 |
| | | | | | llvm-svn: 129079 | ||||
| * | While hoisting common code from if/else, hoist debug info intrinsics if they ↵ | Devang Patel | 2011-04-07 | 1 | -8/+18 |
| | | | | | | | match. llvm-svn: 129078 | ||||
| * | Prevent ARM DAG Combiner from doing an AND or OR combine on an illegal ↵ | Tanya Lattner | 2011-04-07 | 1 | -0/+6 |
| | | | | | | | vector type (vectors of size 3). Also included test cases. llvm-svn: 129074 | ||||
| * | Fixed a bug where missing EDInstInfo would cause | Sean Callanan | 2011-04-07 | 1 | -0/+3 |
| | | | | | | | tokenization to crash and burn. llvm-svn: 129051 | ||||
| * | Sanity check MSRi for invalid mask values and reject it as invalid. | Johnny Chen | 2011-04-07 | 1 | -0/+5 |
| | | | | | | | rdar://problem/9246844 llvm-svn: 129050 | ||||
| * | PR9634: Don't unconditionally tell the AliasSetTracker that the PreheaderLoad | Eli Friedman | 2011-04-07 | 1 | -21/+4 |
| | | | | | | | | | | | | is equivalent to any other relevant value; it isn't true in general. If it is equivalent, the LoopPromoter will tell the AST the equivalence. Also, delete the PreheaderLoad if it is unused. Chris, since you were the last one to make major changes here, can you check that this is sane? llvm-svn: 129049 | ||||
| * | The ARM disassembler was not recognizing USADA8 instruction. Need to add ↵ | Johnny Chen | 2011-04-07 | 1 | -3/+5 |
| | | | | | | | | | | | checking for register values for USAD8 and USADA8. rdar://problem/9247060 llvm-svn: 129047 | ||||
| * | Change -arm-divmod-libcall to a target neutral option. | Evan Cheng | 2011-04-07 | 2 | -6/+7 |
| | | | | | llvm-svn: 129045 | ||||
| * | Remove dead code. rdar://9221736. | Evan Cheng | 2011-04-07 | 1 | -5/+0 |
| | | | | | llvm-svn: 129044 | ||||
| * | Should also check SMLAD for invalid register values. | Johnny Chen | 2011-04-07 | 1 | -6/+12 |
| | | | | | | | rdar://problem/9246650 llvm-svn: 129042 | ||||
| * | Simplify. isIdenticalToWhenDefined() checks opcode. | Devang Patel | 2011-04-07 | 1 | -4/+2 |
| | | | | | llvm-svn: 129041 | ||||

