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* [GCOV] Emit the writeout function as nested loops of global data.Chandler Carruth2018-05-021-35/+186
* [X86][SNB] Fix scheduling of MMX integer multiply instructions.Simon Pilgrim2018-05-021-8/+8
* [X86] Split WriteShuffle/WriteVarShuffle + WriteBlend/WriteVarBlend into XMM ...Simon Pilgrim2018-05-0210-136/+75
* [COFF, ARM64] Hook up a few remaining relocationsMartin Storsjo2018-05-021-0/+9
* [AMDGPU] A trivial fix for a buildbot failure caused by "commit 224a839fcbbea...Farhana Aleen2018-05-021-1/+1
* [reassociate] Fix excessive revisits when processing long chains of reassocia...Daniel Sanders2018-05-021-7/+8
* [X86] Cleanup WriteFShuffle/WriteFVarShuffle (+256 variants) scheduler classe...Simon Pilgrim2018-05-025-252/+54
* Add assertion to padding size calculation, NFCKrzysztof Parzyszek2018-05-021-0/+1
* Revert "[AMDGPU] performAddCombine should run after DAG is legalized."Farhana Aleen2018-05-021-1/+1
* [X86] Convert most remaining XOP uses of X86SchedWritePair scheduler classes ...Simon Pilgrim2018-05-021-88/+102
* [AMDGPU] performAddCombine should run after DAG is legalized.Farhana Aleen2018-05-021-1/+1
* Fix line-endings. NFCI.Simon Pilgrim2018-05-021-3/+3
* Re-land rL331357 "[X86] Fix scheduling info for VMPSADBWYrmi."Clement Courbet2018-05-021-1/+1
* [X86] Cleanup WriteFMul scheduler classes with more common default valuesSimon Pilgrim2018-05-023-70/+14
* Fix '32-bit shift implicitly converted to 64 bits' warning by using APInt::se...Simon Pilgrim2018-05-021-1/+1
* Revert rL331355 "[X86] Fix scheduling info for VMPSADBWYrmi."Clement Courbet2018-05-021-16/+5
* [X86] Fix scheduling info for (V?)SQRTPDm on silvermont.Clement Courbet2018-05-021-1/+1
* [X86] Fix scheduling info for VMPSADBWYrmi.Clement Courbet2018-05-021-5/+16
* [MIPS] Fix DIV/DIVU scheduling classes.Clement Courbet2018-05-021-2/+2
* [X86] Convert most remaining AVX512 uses of X86SchedWritePair scheduler class...Simon Pilgrim2018-05-022-245/+279
* [AArch64][SVE] Asm: Support for LDR/STR fill and spill instructions.Sander de Smalen2018-05-022-1/+109
* [TableGen] Don't quote variable name when printing !foreach.Simon Tatham2018-05-021-3/+5
* [AArch64][SVE] Asm: Support for scatter ST1 store instructions.Sander de Smalen2018-05-022-0/+172
* Revert "[mips] Correct the predicates of sign extension instructions"Simon Dardis2018-05-024-5/+29
* [X86] Convert most remaining uses of X86SchedWritePair scheduler classes to X...Simon Pilgrim2018-05-022-194/+222
* [mips] Correct the predicates of sign extension instructionsSimon Dardis2018-05-024-29/+5
* [AArch64][SVE] Asm: Support for non-temporal, contiguous LDNT1/STNT1 load/sto...Sander de Smalen2018-05-022-0/+150
* [LoopInterchange] Update some loops to use range base for loops (NFC).Florian Hahn2018-05-021-30/+24
* [mips] Correct the predicates for shifts.Simon Dardis2018-05-022-23/+21
* [X86] Cleanup WriteFAdd/WriteFCmp scheduler classes with more common default ...Simon Pilgrim2018-05-026-105/+41
* [AArch64][SVE] Asm: Support for LD1RQ load-and-replicate quad-word vector ins...Sander de Smalen2018-05-024-0/+77
* [SelectionDAG] Selection of DBG_VALUE using a PHI node result (pt 2)Bjorn Pettersson2018-05-022-6/+36
* Fix release build breakageSam Clegg2018-05-021-0/+2
* [AMDGPU] Support horizontal vectorization.Farhana Aleen2018-05-013-0/+43
* [CFLGraph][NFC] Simplify/reorder switch in visitConstantExprDavid Bolvansky2018-05-011-37/+17
* [AggressiveInstCombine] convert a chain of 'or-shift' bits into masked compareSanjay Patel2018-05-011-21/+94
* Create a MachineBasicBlock for created IR-level BasicBlockJessica Paquette2018-05-011-0/+9
* [DAGCombiner] Fix SDLoc in a (zext (zextload x)) combine (4/N)Vedant Kumar2018-05-011-33/+35
* [DAGCombiner] Fix SDLoc in a (sext (sextload x)) combine (3/N)Vedant Kumar2018-05-011-3/+3
* [DAGCombiner] Change the SDLoc on split extloads (2/N)Vedant Kumar2018-05-011-1/+1
* [DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N)Vedant Kumar2018-05-011-1/+1
* AMDGPU: Remove remnants of gfx901 (it was deprecated some time ago)Konstantin Zhuravlyov2018-05-011-2/+1
* [X86][AMD][Bulldozer] Fix Bulldozer Model 2 detection.Roman Lebedev2018-05-011-2/+2
* [X86] Split WriteFMul/WriteFDiv into XMM and YMM/ZMM scheduler classesSimon Pilgrim2018-05-0110-89/+73
* llvm-symbolizer: Handle function definitions nested within other functionsDavid Blaikie2018-05-011-2/+6
* [X86] Split WriteFRcp/WriteFRsqrt/WriteFSqrt into XMM and YMM/ZMM scheduler c...Simon Pilgrim2018-05-0112-97/+117
* [X86] Split WriteFCmp into XMM and YMM/ZMM scheduler classesSimon Pilgrim2018-05-0112-83/+48
* [X86] Split WriteFAdd into XMM and YMM/ZMM scheduler classesSimon Pilgrim2018-05-0110-79/+19
* Remove @brief commands from doxygen comments, too.Adrian Prantl2018-05-0116-89/+89
* [X86] Convert all uses of WriteFAdd to X86SchedWriteWidths.Simon Pilgrim2018-05-013-162/+180
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