| Commit message (Collapse) | Author | Age | Files | Lines |
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an odd number.
llvm-svn: 129270
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--- Reverse-merging r129235 into '.':
D test/Feature/bb_attrs.ll
U include/llvm/BasicBlock.h
U include/llvm/Bitcode/LLVMBitCodes.h
U lib/VMCore/AsmWriter.cpp
U lib/VMCore/BasicBlock.cpp
U lib/AsmParser/LLParser.cpp
U lib/AsmParser/LLLexer.cpp
U lib/AsmParser/LLToken.h
U lib/Bitcode/Reader/BitcodeReader.cpp
U lib/Bitcode/Writer/BitcodeWriter.cpp
llvm-svn: 129259
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llvm-svn: 129248
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* Add a "landing pad" attribute to the BasicBlock.
* Modify the bitcode reader and writer to handle said attribute.
Later: The verifier will ensure that the landing pad attribute is used in the
appropriate manner. I.e., not applied to the entry block, and applied only to
basic blocks that are branched to via a `dispatch' instruction.
(This is a work-in-progress.)
llvm-svn: 129235
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InstAlias doesn't allow matching immediate operands, so we have to write
C++ code to do this.
llvm-svn: 129223
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llvm-svn: 129214
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And don't append the name over and over again in the loop.
llvm-svn: 129210
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llvm-svn: 129209
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is an array of structures doesn't imply it's a ConstantArray of
ConstantStruct.
llvm-svn: 129207
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indirectbr.
llvm-svn: 129203
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delete the instruction pointed to by CGP's current instruction
iterator, leading to a crash on the testcase. This fixes PR9578.
llvm-svn: 129200
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code.
Switch lowering probably shouldn't be using FP for this. This resolves PR9581.
llvm-svn: 129199
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it's completely safe to cache the AST across LICM runs even with this fix,
but this fix can't hurt.
llvm-svn: 129198
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llvm-svn: 129193
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It is common for large live ranges to have few basic blocks with register uses
and many live-through blocks without any uses. This approach grows the Hopfield
network incrementally around the use blocks, completely avoiding checking
interference for some through blocks.
llvm-svn: 129188
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This doesn't require seeking in the live interval union, so it is very cheap.
llvm-svn: 129187
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with undef arguments.
llvm-svn: 129185
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error stream, in cases where the AsmParser is
being invoked by EDDisassembler. Before, they
were being sent to errs() because no error handler
was installed in the SourceMgr.
llvm-svn: 129177
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have same non-zero number as lower bound as well as upper bound.
llvm-svn: 129170
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can be used even when main() isn't present in the Module, but it means that you
don't get to read argv[].
llvm-svn: 129163
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llvm-svn: 129160
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If lower bound is more then upper bound then consider it is an unbounded array.
An array is unbounded if non-zero lower bound is same as upper bound.
If lower bound and upper bound are zero than array has one element.
llvm-svn: 129156
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is lowered into a call to the specified trap function at sdisel time.
llvm-svn: 129152
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llvm-svn: 129149
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llvm-svn: 129148
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PR9650
rdar://problem/9257565
llvm-svn: 129147
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PR9648
rdar://problem/9257634
llvm-svn: 129146
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The previous cleanup of LDRD got overzealous and removed it, causing post-RA
scheduling to get overzealous in breaking antidependencies and invalidate these instructions. Hilarity and invalid assembly ensued.
rdar://9244161
llvm-svn: 129144
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Teach 32-bit section loading to use the Memory Manager interface, just like
the 64-bit loading does. Tidy up a few other things here and there.
llvm-svn: 129138
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of { i32, void ()* }. Teach the verifier to verify that, deleting copies of
checks strewn about.
llvm-svn: 129128
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Add more test cases to exercise the logical branches related to the above change.
llvm-svn: 129117
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When two section names share a suffix, reuse the entry in shstrtab.
llvm-svn: 129115
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llvm-svn: 129114
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with the newer, cleaner model. It uses the IAPrinter class to hold the
information that is needed to match an instruction with its alias. This also
takes into account the available features of the platform.
There is one bit of ugliness. The way the logic determines if a pattern is
unique is O(N**2), which is gross. But in reality, the number of items it's
checking against isn't large. So while it's N**2, it shouldn't be a massive time
sink.
llvm-svn: 129110
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instruction. rdar://9249183.
llvm-svn: 129107
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Patch by Roman Divacky.
Fixes PR9361.
llvm-svn: 129106
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llvm-svn: 129105
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llvm-svn: 129104
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llvm-svn: 129101
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induction variable. The preRA scheduler is unaware of induction vars,
so we look for potential "virtual register cycles" instead.
Fixes <rdar://problem/8946719> Bad scheduling prevents coalescing
llvm-svn: 129100
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llvm-svn: 129099
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extend instructions.
Add some test cases.
llvm-svn: 129098
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llvm-svn: 129096
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PHI values may be deleted, causing the flags to be wrong. This fixes PR9616.
llvm-svn: 129092
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And two test cases.
llvm-svn: 129090
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llvm-svn: 129087
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llvm-svn: 129081
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llvm-svn: 129080
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llvm-svn: 129079
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match.
llvm-svn: 129078
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