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* Object: BSS/virtual sections don't have contentsDavid Majnemer2014-09-262-0/+13
* clang-format of ChangeStdinToBinary & ChangeStdoutToBinary.Yaron Keren2014-09-261-4/+4
* [x86] Fix a moderately terrifying bug in the new 128-bit shuffle logicChandler Carruth2014-09-261-5/+10
* [IndVar] Don't widen loop compare unless IV user is sign extended.Chad Rosier2014-09-261-2/+6
* R600/SI: Use break instead of continueMatt Arsenault2014-09-261-1/+1
* R600/SI: Add a note about the order of the operands to div_scaleMatt Arsenault2014-09-261-0/+6
* R600/SI: Move finding SGPR operand to move to separate functionMatt Arsenault2014-09-262-63/+71
* R600/SI Allow same SGPR to be used for multiple operandsMatt Arsenault2014-09-261-5/+32
* R600/SI: Partially move operand legalization to post-isel hook.Matt Arsenault2014-09-264-70/+41
* R600/SI: Implement findCommutedOpIndicesMatt Arsenault2014-09-262-1/+36
* R600/SI: Don't move operands that are required to be SGPRsMatt Arsenault2014-09-261-1/+20
* R600/SI: Don't assert on exotic operand typesMatt Arsenault2014-09-261-1/+1
* R600/SI: Fix using wrong operand indices when commutingMatt Arsenault2014-09-261-11/+20
* R600/SI: Remove apparently dead code in legalizeOperandsMatt Arsenault2014-09-261-8/+0
* Ignore annotation function calls in cost computationDavid Peixotto2014-09-261-0/+1
* [x86] The mnemonic is SHUFPS not SHUPFS. =[ I'm very bad at spellingChandler Carruth2014-09-261-3/+3
* [x86] In the new vector shuffle lowering, when trying to do anotherChandler Carruth2014-09-261-10/+11
* [x86] Fix a large collection of bugs that crept in as I fleshed out theChandler Carruth2014-09-261-13/+27
* Elide repeated register operand in Thumb1 instructionsRenato Golin2014-09-261-1/+43
* [X86][SchedModel] SSE reciprocal square root instruction latencies.Andrea Di Biagio2014-09-267-15/+39
* Revert "Store TypeUnits in a SmallVector<DWARFUnitSection> instead of a singl...Frederic Riss2014-09-262-23/+16
* Store TypeUnits in a SmallVector<DWARFUnitSection> instead of a single DWARFU...Frederic Riss2014-09-262-16/+23
* Fix unused variable warning added in r218509Daniel Sanders2014-09-261-1/+0
* [mips] Generalize the handling of f128 return values to support f128 arguments.Daniel Sanders2014-09-263-50/+112
* [AVX512] Added load/store from BW/VL subsets to Register2Memory opcode tables.Robert Khasanov2014-09-262-6/+61
* Fix build breakage on MSVC 2013David Majnemer2014-09-261-1/+1
* Target: Fix build breakage.David Majnemer2014-09-261-2/+2
* Support: Remove undefined behavior from &raw_ostream::operator<<David Majnemer2014-09-261-1/+1
* Revert patch ofr218493David Xu2014-09-261-14/+0
* Redundant store instructions should be removed as dead codeDavid Xu2014-09-261-0/+14
* Add the first backend support for on demand subtarget creationEric Christopher2014-09-262-13/+46
* Move resetTargetOptions from taking a MachineFunction to a FunctionEric Christopher2014-09-262-13/+9
* R600/SI: Fix emitting trailing whitespace after s_waitcntMatt Arsenault2014-09-261-5/+19
* [AVX512] Simplify use of !con()Adam Nemet2014-09-261-4/+2
* [AVX512] Pull pattern for subvector extract into the instruction definitionAdam Nemet2014-09-251-9/+6
* [AVX512] Refactor subvector extractsAdam Nemet2014-09-251-98/+69
* [AVX512] Fix typoAdam Nemet2014-09-251-1/+1
* [MachineSink+PGO] Teach MachineSink to use BlockFrequencyInfoBruno Cardoso Lopes2014-09-251-6/+23
* [Support] Add type-safe alternative to llvm::format()Nick Kledzik2014-09-251-0/+57
* Refactoring: raw pointer -> unique_ptrAnton Yartsev2014-09-251-5/+3
* ARM: Remove unneeded check for MI->hasPostISelHook()Tom Stellard2014-09-251-6/+0
* SelectionDAG: Remove #if NDEBUG from check for a post-isel hookTom Stellard2014-09-251-2/+0
* R600/SI: Add support for global atomic addTom Stellard2014-09-254-3/+111
* Lower idempotent RMWs to fence+loadRobin Morisset2014-09-253-6/+115
* Add missing attributes !cmp.[eq,gt,gtu] instructions.Sid Manning2014-09-253-30/+46
* Add llvm_unreachables() for [ASZ]ExtUpper to X86FastISel.cpp to appease the b...Daniel Sanders2014-09-251-0/+3
* [mips] Add CCValAssign::[ASZ]ExtUpper and CCPromoteToUpperBitsInType and hand...Daniel Sanders2014-09-252-4/+82
* Add aliases for VAND imm to VBIC ~immRenato Golin2014-09-253-19/+111
* [x86] Teach the new vector shuffle lowering to use AVX2 instructions forChandler Carruth2014-09-251-16/+31
* [x86] Teach the new vector shuffle lowering a fancier way to lowerChandler Carruth2014-09-251-33/+65
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