summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
...
* ELF symbol table field st_other support, Jack Carter2013-02-194-6/+36
| | | | | | | | | | | excluding visibility bits. Mips (MicroMips) specific STO handling . The st_other field settig for STO_MIPS_MICROMIPS Contributer: Zoran Jovanovic llvm-svn: 175564
* Fix typos.Jakub Staszak2013-02-191-10/+10
| | | | llvm-svn: 175562
* ELF symbol table field st_other support, Jack Carter2013-02-194-3/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | excluding visibility bits. Generic STO handling at the Target level. The st_other field of the ELF symbol table is one byte in size. The first 2 bytes are used for generic visibility and are currently handled by llvm. The other six bits are processor specific and need to be set at the target level. A couple of notes: The new static methods for accessing and setting the "other" flags in include/llvm/MC/MCELF.h match the style guide and not the other methods in the file. I don't like the inconsistency, but feel I should follow the prescribed lowerUpper() convention. STO_ value definitions are not specified in gnu land as consistently as the STT_ and STB_ fields. Probably because the latter were defined in a standards doc and the former defined partially in code. I have stuck with the full byte definition of the flags. Contributer: Zoran Jovanovic llvm-svn: 175561
* Add obvious constantness.Jakub Staszak2013-02-191-2/+2
| | | | llvm-svn: 175560
* ARM NEON: Don't need COPY_TO_REGCLASS in patternArnold Schwaighofer2013-02-191-3/+1
| | | | | | | | | | | | | | | | | In my previous commit: "Merge a f32 bitcast of a v2i32 extractelt A vectorized sitfp on doubles will get scalarized to a sequence of an extract_element of <2 x i32>, a bitcast to f32 and a sitofp. Due to the the extract_element, and the bitcast we will uneccessarily generate moves between scalar and vector registers." I added a pattern containing a copy_to_regclass. The copy_to_regclass is actually not needed. radar://13191881 llvm-svn: 175555
* Fix a bug in mayHaveSideEffects. Functions that do not return are now ↵Nadav Rotem2013-02-191-2/+6
| | | | | | | | considered as instructions with side effects. rdar://13227456 llvm-svn: 175553
* Fix a bug that was found by the clang static analyzer. The var "AT" is null ↵Nadav Rotem2013-02-191-2/+2
| | | | | | so we cant deref it. llvm-svn: 175550
* Whitelist files and block devices instead of blacklisting fifos andDan Gohman2013-02-191-3/+4
| | | | | | character devices. llvm-svn: 175549
* Don't trust st_size of a character device. This fixes usingDan Gohman2013-02-191-3/+3
| | | | | | | | | | /dev/stdin as an input when stdin is connected to a tty, for example. No test, because it's difficult to write a reasonably portable test for this. /dev/stdin isn't a character device when stdin is redirected from a file or connected to a pipe. llvm-svn: 175542
* ARM: Allocation hints must make sure to be in the alloc order.Jim Grosbach2013-02-191-1/+2
| | | | | | | | | When creating an allocation hint for a register pair, make sure the hint for the physical register reference is still in the allocation order. rdar://13240556 llvm-svn: 175541
* Assert that the target provided hints are in the allocation order.Jakob Stoklund Olesen2013-02-191-0/+5
| | | | | | | | | | Target implementations of getRegAllocationHints() should use the provided allocation order, and they can never return hints outside the order. This is already documented in TargetRegisterInfo.h. <rdar://problem/13240556> llvm-svn: 175540
* Hexagon: Sync TSFlags in MCTargetDesc/HexagonBaseInfo.h withJyotsna Verma2013-02-191-28/+60
| | | | | | HexagonInstrFormats.td. llvm-svn: 175537
* Clean up HiPE prologue emission a bit and avoid signed arithmetic tricks.Benjamin Kramer2013-02-191-43/+47
| | | | | | No intended functionality change. llvm-svn: 175536
* Move LLVM_LIBRARY_VISIBILITY for consistency with what was done toRafael Espindola2013-02-191-1/+1
| | | | | | PPCJITInfo.cpp in r175394. llvm-svn: 175531
* Fix GCMetadaPrinter::finishAssembly not executed, patch by Yiannis Tsiouris.Benjamin Kramer2013-02-192-40/+3
| | | | | | | | | | | Due to the execution order of doFinalization functions, the GC information were deleted before AsmPrinter::doFinalization was executed. Thus, the GCMetadataPrinter::finishAssembly was never called. The patch fixes that by moving the code of the GCInfoDeleter::doFinalization to Printer::doFinalization. llvm-svn: 175528
* Make ARMAsmPrinter pass name more precise and fix comment.Eli Bendersky2013-02-191-6/+2
| | | | llvm-svn: 175527
* Make pass name more precise and fix comment.Eli Bendersky2013-02-191-6/+2
| | | | llvm-svn: 175525
* ARM NEON: Merge a f32 bitcast of a v2i32 extracteltArnold Schwaighofer2013-02-191-0/+6
| | | | | | | | | | | | | | A vectorized sitfp on doubles will get scalarized to a sequence of an extract_element of <2 x i32>, a bitcast to f32 and a sitofp. Due to the the extract_element, and the bitcast we will uneccessarily generate moves between scalar and vector registers. The patch fixes this by using a COPY_TO_REGCLASS and a EXTRACT_SUBREG to extract the element from the vector instead. radar://13191881 llvm-svn: 175520
* R600: Add AR_X to the R600_TReg_X register class.Tom Stellard2013-02-191-1/+1
| | | | | NOTE: This is a candidate for the Mesa stable branch. llvm-svn: 175519
* R600: Mark all members of the TRegMem register class as reservedTom Stellard2013-02-191-0/+6
| | | | | | | | This stops the Machine Verifier from complaining about uses of undefined physical registers. NOTE: This is a candidate for the Mesa stable branch. llvm-svn: 175518
* R600: Fix scheduler crash caused by invalid MachinePointerInfoTom Stellard2013-02-191-1/+1
| | | | | | | | | | | | | | Kernel function arguments are lowered to loads from the PARAM_I address space. When creating these load instructions, we were initializing their MachinePointerInfo with an Arguement object that was not attached to any function. This was causing the MachineScheduler to crash when it tried to access the parent of the Arguement. This has been fixed by initializing the MachinePointerInfo with a UndefValue instead. NOTE: This is a candidate for the Mesa stable branch. llvm-svn: 175517
* R600: Fix tracking of implicit defs in the IndirectAddressing passTom Stellard2013-02-191-7/+25
| | | | | | | | | In some cases, we were losing track of live implicit registers which was creating dead defs and causing the scheduler to produce invalid code. NOTE: This is a candidate for the Mesa stable branch. llvm-svn: 175516
* Fix initialization-order bug in llvm::Support::TimeValue. TimeValue::now() ↵Alexey Samsonov2013-02-192-3/+9
| | | | | | is explicitly called during module initialization of lib/Support/Process.cpp. It reads the field of global object PosixZeroTime, which is not guaranteed to be initialized at this point. Found by AddressSanitizer with -fsanitize=init-order option. llvm-svn: 175509
* [asan] instrument memory accesses with unusual sizesKostya Serebryany2013-02-191-29/+49
| | | | | | | | | | | | | | | | | This patch makes asan instrument memory accesses with unusual sizes (e.g. 5 bytes or 10 bytes), e.g. long double or packed structures. Instrumentation is done with two 1-byte checks (first and last bytes) and if the error is found __asan_report_load_n(addr, real_size) or __asan_report_store_n(addr, real_size) is called. Also, call these two new functions in memset/memcpy instrumentation. asan-rt part will follow. llvm-svn: 175507
* Simplify code. No functionality change.Jakub Staszak2013-02-191-14/+7
| | | | llvm-svn: 175501
* Fix capitalization in comment to match function name.Craig Topper2013-02-191-1/+1
| | | | llvm-svn: 175497
* More const correcting of stack coloring.Craig Topper2013-02-191-8/+8
| | | | llvm-svn: 175490
* Const-correct the stack coloring code.Craig Topper2013-02-191-18/+15
| | | | llvm-svn: 175488
* Avoid extra DenseMap lookups in StackColoring::calculateLocalLiveness.Craig Topper2013-02-191-18/+32
| | | | llvm-svn: 175487
* Expand pseudos/macros BteqzT8SltiX16, BteqzT8SltiuX16,Reed Kotler2013-02-192-1/+48
| | | | | | BtnezT8SltiX16, BtnezT8SltiuX16 . llvm-svn: 175486
* Make the dump() function const and reduce the number of hash lookups it ↵Craig Topper2013-02-191-11/+17
| | | | | | performs. llvm-svn: 175485
* Use a reference into the BlockLiveness DenseMap to avoid repeated hash ↵Craig Topper2013-02-191-6/+9
| | | | | | lookups in collectMarkers. llvm-svn: 175484
* Remove some unused private fields from the AArch64MCCodeEmitter. TheseChandler Carruth2013-02-191-7/+2
| | | | | | | | | | fields were only ever set in the constructor. The create method retains its consistent interface so that these bits can be re-threaded through the emitter if they're ever needed. This was found by the -Wunused-private-field Clang warning. llvm-svn: 175482
* Temporarily revert r175470 for more review.Bill Wendling2013-02-191-3/+0
| | | | llvm-svn: 175476
* Expand pseudos BteqzT8CmpiX16 and BtnezT8CmpiX16.Reed Kotler2013-02-193-0/+58
| | | | llvm-svn: 175474
* Use array_pod_sort instead of std::sort.Jakub Staszak2013-02-181-2/+2
| | | | llvm-svn: 175472
* Check to see if the 'no-builtin' attribute is set before simplifying a ↵Bill Wendling2013-02-181-0/+3
| | | | | | library call. llvm-svn: 175470
* X86FrameLowering.cpp: Fixup. Sorry for the breakage.NAKAMURA Takumi2013-02-181-1/+1
| | | | llvm-svn: 175467
* Use LLVM_DELETED_FUNCTION rather than '// do not implement' comments.David Blaikie2013-02-183-6/+6
| | | | | | | Also removes some redundant DNI comments on function declarations already using the macro. llvm-svn: 175466
* X86FrameLowering.cpp: Fix a warning in -Asserts. [-Wunused-variable]NAKAMURA Takumi2013-02-181-2/+1
| | | | llvm-svn: 175464
* Remove a useless assert.Chad Rosier2013-02-181-1/+0
| | | | llvm-svn: 175463
* [fast-isel] Remove an invalid assert.Chad Rosier2013-02-181-1/+0
| | | | | | | | If the memcpy has an odd length with an alignment of 2, this would incorrectly assert on the last 1 byte copy. rdar://13202135 llvm-svn: 175459
* Fix a 32/64 bit incompatibility in the HiPE prologue generation.Benjamin Kramer2013-02-181-1/+1
| | | | llvm-svn: 175458
* Support for HiPE-compatible code emission, patch by Yiannis Tsiouris.Benjamin Kramer2013-02-183-5/+165
| | | | llvm-svn: 175457
* [ms-inline asm] Remove a redundant call to the setHasMSInlineAsm function.Chad Rosier2013-02-181-2/+1
| | | | llvm-svn: 175456
* R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad patternVincent Lejeune2013-02-187-23/+15
| | | | llvm-svn: 175446
* R600: Support for TBOVincent Lejeune2013-02-183-1/+58
| | | | | | | NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard at amd.com> llvm-svn: 175445
* R600: Increase number of ArrayBase Reg to 32Vincent Lejeune2013-02-181-2/+2
| | | | | Reviewed-by: Tom Stellard <thomas.stellard at amd.com> llvm-svn: 175443
* [asan] revert r175266 as it breaks code with packed structures. supporting ↵Kostya Serebryany2013-02-181-1/+1
| | | | | | long double will require a more general solution llvm-svn: 175442
* Futureproof AttrBuild if we ever have more than 64 attr enum values.Benjamin Kramer2013-02-181-14/+12
| | | | | | | Currently we're at 34. Bitset should compile into virtually the same code as uint64_t here. llvm-svn: 175437
OpenPOWER on IntegriCloud