diff options
| author | Vincent Lejeune <vljn@ovi.com> | 2013-02-18 13:48:09 +0000 |
|---|---|---|
| committer | Vincent Lejeune <vljn@ovi.com> | 2013-02-18 13:48:09 +0000 |
| commit | 4c1602b5c983b3e9b53df50c97716e940c70e725 (patch) | |
| tree | f3317cb8b34bb9daf12b91d952f00f1bc2e83a9c /llvm/lib | |
| parent | 7ca384bc1a9070c675d42b01790a6dbea84fcdbd (diff) | |
| download | bcm5719-llvm-4c1602b5c983b3e9b53df50c97716e940c70e725.tar.gz bcm5719-llvm-4c1602b5c983b3e9b53df50c97716e940c70e725.zip | |
R600: Increase number of ArrayBase Reg to 32
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175443
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/R600/R600RegisterInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/R600/R600RegisterInfo.td b/llvm/lib/Target/R600/R600RegisterInfo.td index 3812eb7c61f..071885465a0 100644 --- a/llvm/lib/Target/R600/R600RegisterInfo.td +++ b/llvm/lib/Target/R600/R600RegisterInfo.td @@ -44,7 +44,7 @@ foreach Index = 0-127 in { } // Array Base Register holding input in FS -foreach Index = 448-464 in { +foreach Index = 448-480 in { def ArrayBase#Index : R600Reg<"ARRAY_BASE", Index>; } @@ -66,7 +66,7 @@ def PRED_SEL_ONE : R600Reg<"Pred_sel_one", 3>; def AR_X : R600Reg<"AR.x", 0>; def R600_ArrayBase : RegisterClass <"AMDGPU", [f32, i32], 32, - (add (sequence "ArrayBase%u", 448, 464))>; + (add (sequence "ArrayBase%u", 448, 480))>; // special registers for ALU src operands // const buffer reference, SRCx_SEL contains index def ALU_CONST : R600Reg<"CBuf", 0>; |
