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* [MC] Modify MCAsmStreamer to always build MCAssembler. NFCI.Nirav Dave2018-04-273-24/+39
* [MC] Allow MCAssembler to be constructed without all subcomponents. NFCI.Nirav Dave2018-04-272-16/+35
* [AArch64] Place the first ldp at the end when ReverseCSRRestoreSeq is trueFrancis Visoiu Mistrih2018-04-271-30/+45
* [SystemZ] Remove scheduling info from some Pseudo instructions (NFC).Jonas Paulsson2018-04-277-133/+22
* [LoopInterchange] Allow some loops with PHI nodes in the exit block.Florian Hahn2018-04-271-23/+48
* [AArch64] Codegen for v8.2A dot product intrinsicsOliver Stannard2018-04-272-13/+39
* [NVPTX] Turn on Loop/SLP vectorizationBenjamin Kramer2018-04-271-0/+12
* [X86] Replace some system instruction instregex single matches with instrs en...Simon Pilgrim2018-04-277-85/+60
* [mips] Fix how compiler fuse instructions to fmadd/fmsubAleksandar Beserminji2018-04-275-9/+30
* [ARM] Codegen for v8.2A dot product intrinsicsOliver Stannard2018-04-271-26/+48
* [ARM] Enable misched for R52.David Green2018-04-271-0/+1
* [IR] Do not assume that function pointers are alignedMikhail Maltsev2018-04-271-0/+4
* [mips] Add support for Virtualization ASEPetar Jovanovic2018-04-2713-24/+357
* [SCEV] Add trivial case handling for umin utilities. NFC.Serguei Katkov2018-04-271-2/+11
* [SCEV] Introduce bulk umin creation utilitiesSerguei Katkov2018-04-271-19/+45
* Revert "[SimplifyLibcalls] Replace locked IO with unlocked IO"Matt Morehouse2018-04-273-257/+20
* [LowerTypeTests] Mark .cfi.jumptable nounwind.Eli Friedman2018-04-271-0/+2
* [MachineOutliner] Don't outline from functions with a section marking.Eli Friedman2018-04-271-0/+7
* typoSam Clegg2018-04-271-2/+3
* [WebAssembly] Section symbols must have local bindingSam Clegg2018-04-272-1/+5
* [SimplifyLibcalls] Replace locked IO with unlocked IODavid Bolvansky2018-04-263-20/+257
* [x86] Revert r330322 (& r330323): Lowering x86 adds/addus/subs/subus intrinsicsChandler Carruth2018-04-263-193/+42
* Revert "Fix a bug that prevents global variables from having a DW_OP_deref."Adrian Prantl2018-04-261-3/+2
* [InstCombine] Simplify Add with remainder expressions as operands.Sanjoy Das2018-04-262-0/+116
* [GlobalISel] Reporting rules covered as part of the InstructionSelect's debug...Roman Tereshin2018-04-262-1/+12
* [mips] Accept 32-bit offsets for lb and lbu commandsSimon Atanasyan2018-04-262-2/+32
* [WebAssembly] Write DWARF data into wasm object fileSam Clegg2018-04-264-27/+230
* DAG: Fix not legalizing vector fcanonicalizesMatt Arsenault2018-04-262-0/+2
* AMDGPU: Extend extract_vector_elt fneg combine to fabsMatt Arsenault2018-04-261-2/+3
* AMDGPU: Consolidate SubtargetPredicate definitionsMatt Arsenault2018-04-262-7/+7
* [AArch64] Fix scavenged spill slot base when stack realignment required.Geoff Berry2018-04-261-2/+10
* Fix a bug that prevents global variables from having a DW_OP_deref.Adrian Prantl2018-04-261-2/+3
* [WebAssembly] Add version to object file metadataSam Clegg2018-04-263-1/+11
* [GlobalMerge] Fix a typoHaicheng Wu2018-04-261-1/+1
* Revert "Enable EliminateAvailableExternally pass for -O1"Vlad Tsyrklevich2018-04-261-1/+1
* Update stale comment in AsmWriter.cppVlad Tsyrklevich2018-04-261-1/+3
* Enable EliminateAvailableExternally pass for -O1Vlad Tsyrklevich2018-04-261-1/+1
* [WebAssembly] Implement getRelocationValueString()Sam Clegg2018-04-261-4/+8
* [AMDGPU][Waitcnt] As of gfx7, VMEM operations do not increment the export cou...Mark Searles2018-04-262-1/+5
* [mips] Correct the definitions of some control instructionsSimon Dardis2018-04-263-39/+36
* [DAGCombiner] limit ftrunc optimizations with function attributeSanjay Patel2018-04-261-0/+8
* [RISCV] Implement isLoadFromStackSlot and isStoreToStackSlotAlex Bradbury2018-04-262-0/+54
* [NVPTX] Make the legalizer expand shufflevector of <2 x half>Benjamin Kramer2018-04-261-0/+1
* [DAGCombiner] refactor FP->int->FP folds; NFCSanjay Patel2018-04-261-16/+26
* [RISCV] Implement isZextFreeAlex Bradbury2018-04-262-0/+15
* [TTI, AArch64] Add transpose shuffle kindMatthew Simpson2018-04-263-10/+103
* [RISCV] Implement isTruncateFreeAlex Bradbury2018-04-262-0/+22
* [X86] Fix Update Kill Register in Avoid SFB Pass - Bug 37153Lama Saba2018-04-261-19/+29
* [RISCV] Implement isLegalICmpImmediateAlex Bradbury2018-04-262-0/+5
* [RISCV] Implement isLegalAddImmediateAlex Bradbury2018-04-262-0/+5
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