summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
Commit message (Expand)AuthorAgeFilesLines
* [InstCombine] reassociateShiftAmtsOfTwoSameDirectionShifts(): fix miscompile ...Roman Lebedev2020-02-271-2/+22
* [InstCombine] prevent crashing/assert on shift constant expression (PR44028)Sanjay Patel2019-11-171-1/+2
* [InstCombine] canonicalize shift+logic+shift to reduce dependency chainSanjay Patel2019-11-071-0/+46
* [InstCombine] dropRedundantMaskingOfLeftShiftInput(): truncation (PR42563)Roman Lebedev2019-11-051-2/+33
* [IR] move helper function to replace undef constant (elements) with fixed con...Sanjay Patel2019-10-291-20/+2
* [InstCombine] Shift amount reassociation in shifty sign bit test (PR43595)Roman Lebedev2019-10-201-16/+37
* [NFC][InstCombine] Some more preparatory cleanup for dropRedundantMaskingOfLe...Roman Lebedev2019-10-171-4/+4
* [InstCombine] fold a shifted bool zext to a select (2nd try)Sanjay Patel2019-10-151-0/+6
* Revert [InstCombine] fold a shifted bool zext to a selectSanjay Patel2019-10-141-6/+0
* [InstCombine] fold a shifted bool zext to a selectSanjay Patel2019-10-141-0/+6
* [NFC][InstCombine] Some preparatory cleanup in dropRedundantMaskingOfLeftShif...Roman Lebedev2019-10-131-23/+21
* [InstCombine][NFC] dropRedundantMaskingOfLeftShiftInput(): change how we deal...Roman Lebedev2019-10-071-70/+62
* [InstCombine] dropRedundantMaskingOfLeftShiftInput(): propagate undef shift a...Roman Lebedev2019-10-071-0/+33
* [InstCombine] Right-shift shift amount reassociation with truncation (PR43564...Roman Lebedev2019-10-041-15/+19
* [InstCombine] Bypass high bit extract before variable sign-extension (PR43523)Roman Lebedev2019-10-021-0/+72
* [InstCombine][NFC] visitShl(): call SimplifyQuery::getWithInstruction() onceRoman Lebedev2019-09-301-10/+9
* [InstCombine] Simplify shift-by-sext to shift-by-zextRoman Lebedev2019-09-271-0/+7
* [IR] Add getExtendedType() to IntegerType and Type (dispatching to IntegerTyp...Roman Lebedev2019-09-231-10/+2
* [InstCombine] dropRedundantMaskingOfLeftShiftInput(): improve commentRoman Lebedev2019-09-231-4/+4
* [InstCombine] dropRedundantMaskingOfLeftShiftInput(): pat. c/d/e with mask (P...Roman Lebedev2019-09-231-3/+28
* [InstCombine] dropRedundantMaskingOfLeftShiftInput(): pat. a/b with mask (PR4...Roman Lebedev2019-09-231-3/+30
* [InstCombine] dropRedundantMaskingOfLeftShiftInput(): some cleanup before upc...Roman Lebedev2019-09-181-5/+8
* [NFC][InstCombine] dropRedundantMaskingOfLeftShiftInput(): some NFC diff shavingRoman Lebedev2019-09-171-8/+11
* Remove duplicate 'BitWidth' variable. NFCI.Simon Pilgrim2019-08-281-1/+0
* Revert r367891 - "[InstCombine] combine mul+shl separated by zext"Sanjay Patel2019-08-161-13/+2
* [InstCombine] Recommit: Shift amount reassociation: shl-trunc-shl patternRoman Lebedev2019-08-071-24/+72
* Revert [InstCombine] Shift amount reassociation: shl-trunc-shl patternReid Kleckner2019-08-061-66/+24
* [InstCombine] Shift amount reassociation: shl-trunc-shl patternRoman Lebedev2019-08-061-24/+66
* [InstCombine] combine mul+shl separated by zextSanjay Patel2019-08-051-2/+13
* [InstCombine] add extra use constraint for shl-zext foldSanjay Patel2019-08-051-1/+1
* [InstCombine] Dropping redundant masking before left-shift [5/5] (PR42563)Roman Lebedev2019-07-191-4/+5
* [InstCombine] Dropping redundant masking before left-shift [4/5] (PR42563)Roman Lebedev2019-07-191-3/+6
* [InstCombine] Dropping redundant masking before left-shift [3/5] (PR42563)Roman Lebedev2019-07-191-2/+6
* [InstCombine] Dropping redundant masking before left-shift [2/5] (PR42563)Roman Lebedev2019-07-191-16/+32
* [InstCombine] Dropping redundant masking before left-shift [1/5] (PR42563)Roman Lebedev2019-07-191-2/+5
* [InstCombine] Dropping redundant masking before left-shift [0/5] (PR42563)Roman Lebedev2019-07-191-0/+50
* [PatternMatch] Generalize m_SpecificInt_ULT() to take ICmpInst::PredicateRoman Lebedev2019-07-101-1/+2
* [InstCombine] Shift amount reassociation: fixup constantexpr handling (PR42484)Roman Lebedev2019-07-021-3/+3
* [InstCombine] Shift amount reassociation (PR42391)Roman Lebedev2019-06-291-0/+48
* [InstCombine] (1 << (C - x)) -> ((1 << C) >> x) if C is bitwidth - 1David Bolvansky2019-06-211-0/+8
* [InstCombine] canShiftBinOpWithConstantRHS(): drop bogus signbit checkRoman Lebedev2019-05-171-26/+8
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [InstCombine] Ensure nested shifts are in range (OSS-Fuzz #9880)Simon Pilgrim2018-11-061-5/+6
* [InstCombine] name change: foldShuffledBinop -> foldVectorBinop; NFCSanjay Patel2018-10-031-3/+3
* Remove trailing spaceFangrui Song2018-07-301-1/+1
* [InstCombine] simplify binops before trying other foldsSanjay Patel2018-06-211-11/+11
* [NFC][SCEV] Add tests related to bit masking (PR37793)Roman Lebedev2018-06-201-5/+2
* [InstCombine] Recommit: Fold (x << y) >> y -> x & (-1 >> y)Roman Lebedev2018-06-151-0/+9
* Revert rL334371 / D47980: "[InstCombine] Fold (x << y) >> y -> x & (-1 >> y)"Roman Lebedev2018-06-101-9/+0
* [InstCombine] Fold (x >> y) << y -> x & (-1 << y)Roman Lebedev2018-06-101-1/+10
OpenPOWER on IntegriCloud