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path: root/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
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* [InstCombine] Support ssub.sat canonicalization for non-splatsNikita Popov2018-12-011-5/+4
* [InstCombine] Combine saturating add/sub with constant operandsNikita Popov2018-11-281-0/+34
* [InstCombine] Canonicalize ssub.sat to sadd.satNikita Popov2018-11-281-0/+11
* [InstCombine] Use known overflow information for saturating add/subNikita Popov2018-11-281-0/+38
* [InstCombine] Canonicalize const arg for saturating addsNikita Popov2018-11-281-0/+6
* [InstCombine] add helper function to reduce code duplication; NFCSanjay Patel2018-11-261-24/+19
* [InstCombine] Simplify funnel shift with zero/undef operand to shiftNikita Popov2018-11-231-0/+23
* [InstCombine] fold funnel shift amount based on demanded bitsSanjay Patel2018-11-131-0/+14
* [GC][InstCombine] Fix a potential iteration issuePhilip Reames2018-11-121-1/+4
* InstCombine: Avoid introducing poison values when lowering llvm.amdgcn.[us]bfeTom Stellard2018-11-081-13/+5
* [InstCombine] Combine nested min/max intrinsics with constantsVolkan Keles2018-10-311-1/+35
* [InstCombine] InstCombine and InstSimplify for minimum and maximumThomas Lively2018-10-191-5/+22
* [TI removal] Make variables declared as `TerminatorInst` and initializedChandler Carruth2018-10-151-1/+1
* [InstCombine] Fix SimplifyLibCalls erasing an instruction while IC still had ...Amara Emerson2018-10-111-1/+5
* [IRBuilder] Fixup CreateIntrinsic to allow specifying Types to Mangle.Neil Henning2018-10-081-5/+5
* [InstCombine][x86] try even harder to convert blendv intrinsic to generic IR ...Sanjay Patel2018-09-221-7/+20
* [InstCombine][x86] try harder to convert blendv intrinsic to generic IR (PR38...Sanjay Patel2018-09-151-7/+15
* [InstCombine] canonicalize fneg with llvm.sinSanjay Patel2018-08-291-5/+14
* AMDGPU: Remove nan tests in class if src is nnanMatt Arsenault2018-08-281-0/+7
* [X86] Remove masking from the 512-bit padds and psubs intrinsics. Use select ...Craig Topper2018-08-161-33/+13
* AMDGPU: Stop producing icmp/fcmp intrinsics with invalid typesMatt Arsenault2018-08-151-0/+27
* [X86] Constant folding of adds/subs intrinsicsTomasz Krupa2018-08-141-0/+98
* AMDGPU: Turn class x, p_zero|n_zero into fcmp oeq x, 0Matt Arsenault2018-08-101-0/+9
* [InstSimplify] move minnum/maxnum with Inf folds from instcombineSanjay Patel2018-08-091-35/+0
* [InstSimplify] move minnum/maxnum with common op fold from instcombineSanjay Patel2018-08-071-30/+0
* [InstSimplify] move minnum/maxnum with undef fold from instcombineSanjay Patel2018-08-021-11/+0
* [InstSimplify] move minnum/maxnum with same arg fold from instcombineSanjay Patel2018-08-011-4/+0
* PatternMatch: Add wrappers for fabs and canonicalizeMatt Arsenault2018-07-271-3/+3
* Simplify recursive launder.invariant.group and stripPiotr Padlewski2018-07-121-1/+39
* [X86] Remove and autoupgrade the scalar fma intrinsics with masking.Craig Topper2018-07-121-10/+0
* llvm: Add support for "-fno-delete-null-pointer-checks"Manoj Gupta2018-07-091-1/+3
* Fix asserts in AMDGCN fmed3 folding by handling more cases of NaNMatt Arsenault2018-07-051-7/+18
* [X86] Remove X86 specific scalar FMA intrinsics and upgrade to tart independe...Craig Topper2018-07-051-2/+0
* [X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics tha...Craig Topper2018-06-271-6/+6
* [InstCombine] ignore debuginfo when removing redundant assumes (PR37726)Sanjay Patel2018-06-201-3/+5
* [IR] Introduce helpers to skip debug instructions (NFC)Vedant Kumar2018-06-191-11/+3
* [InstCombine] Replacing X86-specific rounding intrinsics with generic floor-ceilMikhail Dvoretckii2018-06-191-2/+128
* [X86] Remove masking from the 512-bit masked floating point add/sub/mul/div i...Craig Topper2018-06-101-50/+17
* [InstCombine] Skip dbg.value(s) when looking at stack{save,restore}.Davide Italiano2018-06-081-1/+8
* InstCombine: ignore debug instructions during fence combineTim Northover2018-06-061-1/+5
* Move Analysis/Utils/Local.h back to TransformsDavid Blaikie2018-06-041-1/+1
* [InstCombine, ARM] Convert vld1 to llvm loadAlexandros Lamprineas2018-05-311-1/+30
* [InstCombine, ARM, AArch64] Convert table lookup to shuffle vectorAlexandros Lamprineas2018-05-301-0/+46
* [InstCombine] Combine XOR and AES instructions on ARM/ARM64.Chad Rosier2018-05-241-0/+17
* [AMDGPU] Optimze old value of v_mov_b32_dppStanislav Mekhanoshin2018-05-221-0/+17
* [X86] Remove mask arguments from permvar builtins/intrinsics. Use a select in...Craig Topper2018-05-201-20/+12
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-2/+2
* [X86] Extend instcombine folds for pclmuldq intrinsics to the 256 and 512 bit...Craig Topper2018-05-131-9/+12
* [X86] Remove and autoupgrade masked vpermd/vpermps intrinsics.Craig Topper2018-05-131-2/+0
* [X86] Remove and autoupgrade a bunch of FMA instrinsics that are no longer us...Craig Topper2018-05-111-6/+0
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