summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target
Commit message (Expand)AuthorAgeFilesLines
* AMDGPU: Refactor immediate folding logicMatt Arsenault2016-11-291-14/+50
* [AArch64] Fold spills of COPY of WZR/XZRGeoff Berry2016-11-291-0/+25
* Avoid repeated calls to MVT getSizeInBits and getScalarSizeInBits(). NFCI.Simon Pilgrim2016-11-291-7/+12
* [PowerPC] Improvements for BUILD_VECTOR Vol. 1Nemanja Ivanovic2016-11-293-58/+361
* [X86] Moved getTargetConstantFromNode function so a future patch is more unde...Simon Pilgrim2016-11-291-19/+19
* [X86][SSE] Add initial support for combining target shuffles to (V)PMOVZX.Simon Pilgrim2016-11-291-15/+37
* Avoid repeated calls to MVT::getScalarSizeInBits(). NFCI.Simon Pilgrim2016-11-291-2/+2
* AMDGPU/SI: Avoid moving PHIs to VALU when phi values are defined in scalar br...Tom Stellard2016-11-291-8/+38
* MachineScheduler: Export function to construct "default" scheduler.Matthias Braun2016-11-289-31/+36
* [AMDGPU] Allow hoisting of comparisons out of a loop and eliminate condition ...Stanislav Mekhanoshin2016-11-283-9/+98
* [X86][SSE] Add initial support for combining (V)PMOVZX with shuffles.Simon Pilgrim2016-11-281-0/+9
* [x86] fix formatting; NFCSanjay Patel2016-11-281-16/+14
* [X86][SSE] Added support for combining bit-shifts with shuffles.Simon Pilgrim2016-11-281-5/+57
* Test commitDaniel Cederman2016-11-281-1/+0
* [SystemZ] Fix build bot fallout from r288030Ulrich Weigand2016-11-281-1/+0
* [SystemZ] Support execution hint instructionsUlrich Weigand2016-11-2814-6/+158
* [SystemZ] Support load-and-trap instructionsUlrich Weigand2016-11-289-7/+116
* [SystemZ] Add remaining branch instructionsUlrich Weigand2016-11-288-32/+153
* [SystemZ] Improve use of conditional instructionsUlrich Weigand2016-11-2815-147/+616
* [X86][FMA4] Remove isCommutable from FMA4 scalar intrinsics. They aren't comm...Craig Topper2016-11-271-1/+0
* [X86][FMA] Add missing Predicates qualifier around scalar FMA intrinsic patte...Craig Topper2016-11-271-6/+8
* [X86][FMA4] Add load folding support for FMA4 scalar intrinsic instructions.Craig Topper2016-11-271-0/+20
* [X86] Add SHL by 1 to the load folding tables.Craig Topper2016-11-271-0/+4
* [X86][SSE] Add support for combining target shuffles to 128/256-bit PSLL/PSRL...Simon Pilgrim2016-11-271-49/+22
* [AVX-512] Add integer and fp unpck instructions to load folding tables.Craig Topper2016-11-271-0/+108
* [X86][SSE] Split lowerVectorShuffleAsShift ready for combines. NFCI.Simon Pilgrim2016-11-271-31/+60
* [X86] Add TB_NO_REVERSE to entries in the load folding table where the instru...Craig Topper2016-11-271-188/+206
* [AVX-512] Add masked EVEX vpmovzx/sx instructions to load folding tables.Craig Topper2016-11-271-0/+84
* [X86] Remove alignment restrictions from load folding table for some instruct...Craig Topper2016-11-271-13/+13
* [X86] Remove hasOneUse check that is redundant with the one in IsProfitableTo...Craig Topper2016-11-261-2/+0
* [X86] Fix the zero extending load detection in X86DAGToDAGISel::selectScalarS...Craig Topper2016-11-261-11/+12
* [X86] Simplify control flow. NFCICraig Topper2016-11-261-3/+2
* [X86] Add a hasOneUse check to selectScalarSSELoad to keep the same load from...Craig Topper2016-11-261-3/+6
* [AVX-512] Add unmasked EVEX vpmovzx/sx instructions to load folding tables.Craig Topper2016-11-261-0/+36
* [AVX-512] Add masked 128/256-bit integer add/sub instructions to load folding...Craig Topper2016-11-261-0/+64
* [AVX-512] Add masked 512-bit integer add/sub instructions to load folding tab...Craig Topper2016-11-261-0/+31
* [AVX-512] Teach LowerFormalArguments to use the extended register class when ...Craig Topper2016-11-261-4/+4
* [AVX-512] Add VLX versions of VDIVPD/PS and VMULPD/PS to load folding tables.Craig Topper2016-11-261-0/+8
* AMDGPU/SI: Use float as the operand type for amdgcn.interp intrinsicsTom Stellard2016-11-262-2/+4
* [X86][XOP] Add a reversed reg/reg form for VPROT instructions.Craig Topper2016-11-261-0/+7
* [X86] Add SSE, AVX, and AVX2 version of MOVDQU to the load/store folding tabl...Craig Topper2016-11-261-0/+6
* [AVX-512] Put the AVX-512 sections of the load folding tables into mostly alp...Craig Topper2016-11-251-365/+373
* AMDGPU/SI: Add back reverted SGPR spilling code, but disable itMarek Olsak2016-11-258-96/+284
* Use SDValue helper instead of explicitly going via SDValue::getNode(). NFCISimon Pilgrim2016-11-251-5/+5
* [AVX-512] Add support for changing VSHUFF64x2 to VSHUFF32x4 when its feeding ...Craig Topper2016-11-251-9/+25
* [AVX-512] Add VPERMT2* and VPERMI2* instructions to load folding tables.Craig Topper2016-11-251-0/+32
* Revert "AMDGPU: Implement SGPR spilling with scalar stores"Marek Olsak2016-11-253-153/+10
* Revert "AMDGPU: Fix MMO when splitting spill"Marek Olsak2016-11-252-79/+47
* Revert "AMDGPU: Fix adding extra implicit def of register"Marek Olsak2016-11-251-25/+14
* Revert "AMDGPU: Fix not setting kill flag on temp reg when spilling"Marek Olsak2016-11-251-1/+1
OpenPOWER on IntegriCloud