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* add support for 128 bit inputs on both x86-64 and x86-32.Chris Lattner2008-10-171-9/+6
| | | | llvm-svn: 57709
* Fix a bug where the x86 backend would reject 64-bit r constraints whenChris Lattner2008-10-171-1/+1
| | | | | | | in 32-bit mode instead of assigning a register pair. This has nothing to do with PR2356, but I happened to notice it while working on it. llvm-svn: 57704
* Fix lfence and mfence encoding. These look like MRM5r and MRM6r instructions ↵Evan Cheng2008-10-172-5/+17
| | | | | | except they do not have any operands. The RegModRM byte is encoded with register number 0. llvm-svn: 57692
* getX86RegNum has long been moved to X86RegisterInfo.Evan Cheng2008-10-171-1/+0
| | | | llvm-svn: 57691
* add some simple hacky long double support for the CBE. ThisChris Lattner2008-10-171-5/+15
| | | | | | | should work for intel long double, but ppc long double aborts in convert. llvm-svn: 57672
* Fun x86 encoding tricks: when adding an immediate value of 128,Dan Gohman2008-10-172-8/+26
| | | | | | | | | | | | | use a SUB instruction instead of an ADD, because -128 can be encoded in an 8-bit signed immediate field, while +128 can't be. This avoids the need for a 32-bit immediate field in this case. A similar optimization applies to 64-bit adds with 0x80000000, with the 32-bit signed immediate field. To support this, teach tablegen how to handle 64-bit constants. llvm-svn: 57663
* Define patterns for shld and shrd that match immediateDan Gohman2008-10-173-20/+136
| | | | | | | | | | | | | | | | | | shift counts, and patterns that match dynamic shift counts when the subtract is obscured by a truncate node. Add DAGCombiner support for recognizing rotate patterns when the shift counts are defined by truncate nodes. Fix and simplify the code for commuting shld and shrd instructions to work even when the given instruction doesn't have a parent, and when the caller needs a new instruction. These changes allow LLVM to use the shld, shrd, rol, and ror instructions on x86 to replace equivalent code using two shifts and an or in many more cases. llvm-svn: 57662
* Trim #includes.Dan Gohman2008-10-1610-23/+0
| | | | llvm-svn: 57649
* fix typo noticed by sdtChris Lattner2008-10-161-1/+1
| | | | llvm-svn: 57644
* Fix warnings about mb/me being potentially usedDuncan Sands2008-10-161-2/+2
| | | | | | uninitialized in these functions with gcc-4.3. llvm-svn: 57635
* add some notesChris Lattner2008-10-161-1/+1
| | | | llvm-svn: 57631
* add some notes and a file to collect unimplemented features in theChris Lattner2008-10-161-0/+14
| | | | | | | x86 backend. These will all be answered with "patches welcome", so a PR doesn't help drive them along. llvm-svn: 57630
* mark some targets as experimental. Andrew, if you think that Alpha isChris Lattner2008-10-164-4/+5
| | | | | | | basically working, feel free to remove the tag. The other targets have really basic things that break them. llvm-svn: 57628
* Const-ify several TargetInstrInfo methods.Dan Gohman2008-10-1614-49/+50
| | | | llvm-svn: 57622
* Remove an unused variable.Dan Gohman2008-10-161-1/+0
| | | | llvm-svn: 57621
* Fix the predicate for memop64 to be a regular load, not justDan Gohman2008-10-161-1/+1
| | | | | | an unindexed load. llvm-svn: 57612
* move PR1941 here.Chris Lattner2008-10-151-0/+14
| | | | llvm-svn: 57586
* move PR1604 here.Chris Lattner2008-10-151-0/+17
| | | | llvm-svn: 57582
* move PR1488 into this file.Chris Lattner2008-10-151-0/+33
| | | | llvm-svn: 57579
* Now that predicates can be composed, simplify several ofDan Gohman2008-10-153-205/+135
| | | | | | | | | | | | | the predicates by extending simple predicates to create more complex predicates instead of duplicating the logic for the simple predicates. This doesn't reduce much redundancy in DAGISelEmitter.cpp's generated source yet; that will require improvements to DAGISelEmitter.cpp's instruction sorting, to make it more effectively group nodes with similar predicates together. llvm-svn: 57565
* add a noteChris Lattner2008-10-151-0/+30
| | | | llvm-svn: 57557
* add support for folding immediates into stores when they Chris Lattner2008-10-151-20/+20
| | | | | | | are due to argument passing in calls. This is significant because it hits all immediate arguments to calls on x86-32. llvm-svn: 57556
* fold immediates into stores in simple cases, this produces diffs like Chris Lattner2008-10-151-30/+46
| | | | | | | | | | this: - movl $0, %eax - movl %eax, _yy_n_chars + movl $0, _yy_n_chars llvm-svn: 57555
* fold compare of null pointer into compare with 0.Chris Lattner2008-10-151-0/+4
| | | | llvm-svn: 57553
* Some minor cleanups:Chris Lattner2008-10-151-40/+30
| | | | | | | | | | | | | 1. Compute action in X86SelectSelect based on MVT instead of type. 2. Use TLI.getValueType(..) instead of MVT::getVT(..) because the former handles pointers and the later doesn't. 3. Don't pass TLI into isTypeLegal, since it already has access to it as an ivar. #2 gives fast isel some minor new functionality: handling load/stores of pointers. llvm-svn: 57552
* Use switch on VT instead of Type* comparisons.Chris Lattner2008-10-151-19/+18
| | | | llvm-svn: 57551
* Use X86FastEmitCompare for FCMP_OEQ and FCMP_UNE: it doesn'tChris Lattner2008-10-151-17/+8
| | | | | | change the generated code, but makes the code simpler. llvm-svn: 57550
* refactor compare emission out into a new X86FastEmitCompare method,Chris Lattner2008-10-151-29/+49
| | | | | | | | which makes it easy to share the compare/imm folding logic with 'setcc'. This shaves a bunch of instructions off the common select case, which happens a lot in llvm-gcc. llvm-svn: 57549
* Fold immediates into compares when possible, producing "cmp $4, %eax" instead ofChris Lattner2008-10-151-3/+36
| | | | | | loading 4 into a register and then doing the compare. llvm-svn: 57548
* more minor refactoring of X86SelectBranch, no functionality change.Chris Lattner2008-10-151-13/+11
| | | | llvm-svn: 57547
* factor buildmi calls in X86SelectBranchChris Lattner2008-10-151-89/+30
| | | | llvm-svn: 57546
* factor some more BuildMI's in X86SelectCmpChris Lattner2008-10-151-92/+30
| | | | llvm-svn: 57545
* factor some BuildMI calls, no functionality change.Chris Lattner2008-10-151-46/+56
| | | | llvm-svn: 57544
* - Add target lowering hooks that specify which setcc conditions are illegal,Evan Cheng2008-10-151-21/+11
| | | | | | | | | | | i.e. conditions that cannot be checked with a single instruction. For example, SETONE and SETUEQ on x86. - Teach legalizer to implement *illegal* setcc as a and / or of a number of legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ. - Move x86 target over. llvm-svn: 57542
* FastISel support for exception-handling constructs.Dan Gohman2008-10-143-9/+40
| | | | | | | | | - Move the EH landing-pad code and adjust it so that it works with FastISel as well as with SDISel. - Add FastISel support for @llvm.eh.exception and @llvm.eh.selector. llvm-svn: 57539
* Accept -march=i586, because gcc does (a synonymDale Johannesen2008-10-141-0/+1
| | | | | | | | for pentium). Fixes gcc.target/i386/20000720-1.c gcc.target/i386/pr26826.c llvm-svn: 57528
* Rename LoadX to LoadExt.Evan Cheng2008-10-149-35/+35
| | | | llvm-svn: 57526
* Update ARM Insn encoding to get endian-ness to match the documentation (31-0 ↵Jim Grosbach2008-10-142-61/+57
| | | | | | left to right) llvm-svn: 57524
* Fix command-line option printing to print two spaces where needed,Dan Gohman2008-10-1414-27/+27
| | | | | | | | | instead of requiring all "short description" strings to begin with two spaces. This makes these strings less mysterious, and it fixes some cases where short description strings mistakenly did not begin with two spaces. llvm-svn: 57521
* Fix indentation.Evan Cheng2008-10-141-2/+2
| | | | llvm-svn: 57508
* When doing the very-late shift-and address-mode optimization,Dan Gohman2008-10-131-0/+3
| | | | | | | | | | | | | | create a new DAG node to represent the new shift to keep the DAG consistent, even though it'll almost always be folded into the address. If a user of the resulting address has multiple uses, the nodes may get revisited by a later MatchAddress call, in which case DAG inconsistencies do matter. This fixes PR2849. llvm-svn: 57465
* Update size of inst correctly with segment override.Anton Korobeynikov2008-10-122-0/+12
| | | | llvm-svn: 57414
* Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's asChris Lattner2008-10-1117-63/+50
| | | | | | | parameters instead of raw Constants. This prevents the constants from being selected by the isel pass, fixing PR2735. llvm-svn: 57385
* Fix comment typo.Duncan Sands2008-10-111-1/+1
| | | | llvm-svn: 57381
* Add ability to override segment (mostly for code emitter purposes).Anton Korobeynikov2008-10-114-1/+23
| | | | llvm-svn: 57380
* Fix SSE4.1 roundss, roundsd. While the instructions have Dale Johannesen2008-10-101-38/+52
| | | | | | | | the same pattern as roundpd/roundps, the Intel compiler builtins do not: rounds* has an extra operand. Fixes gcc.target/i386/sse4_1-rounds[sd]-[1234].c llvm-svn: 57370
* Fix a thinko and unbreak sparc default CCAnton Korobeynikov2008-10-101-2/+2
| | | | llvm-svn: 57368
* Extend set of return registers on sparc until someone will implement MRV ↵Anton Korobeynikov2008-10-101-3/+3
| | | | | | support there. At least, this will allow libgcc compile, however we are not ABI-compatible with stuff compiled with native gcc. llvm-svn: 57364
* Ignore extra 'r' modifier for nowAnton Korobeynikov2008-10-101-2/+9
| | | | llvm-svn: 57363
* Use expand for smul_lohi for nowAnton Korobeynikov2008-10-101-0/+1
| | | | llvm-svn: 57362
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