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| author | Dan Gohman <gohman@apple.com> | 2008-10-16 00:03:00 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2008-10-16 00:03:00 +0000 |
| commit | 6bae5268a7e6e6355c73a79911c00db5d9791317 (patch) | |
| tree | 985ca128887eb5490979e5cd7385688dc5d310c0 /llvm/lib/Target | |
| parent | 84a4df8c92aea8da3002a28923c51c0eccc4ddd6 (diff) | |
| download | bcm5719-llvm-6bae5268a7e6e6355c73a79911c00db5d9791317.tar.gz bcm5719-llvm-6bae5268a7e6e6355c73a79911c00db5d9791317.zip | |
Fix the predicate for memop64 to be a regular load, not just
an unindexed load.
llvm-svn: 57612
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 1ae9935473b..0a5089d1ab1 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -134,7 +134,7 @@ def memopv16i8 : PatFrag<(ops node:$ptr), (v16i8 (memop node:$ptr))>; // SSSE3 uses MMX registers for some instructions. They aren't aligned on a // 16-byte boundary. // FIXME: 8 byte alignment for mmx reads is not required -def memop64 : PatFrag<(ops node:$ptr), (unindexedload node:$ptr), [{ +def memop64 : PatFrag<(ops node:$ptr), (load node:$ptr), [{ return cast<LoadSDNode>(N)->getAlignment() >= 8; }]>; |
