summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target
Commit message (Expand)AuthorAgeFilesLines
* [PATCH, PowerPC] Accept 'U' and 'X' constraints in inline asmBill Schmidt2014-09-111-0/+10
* Provide an implementation of getNoopForMachoTarget for SPARC.Brad Smith2014-09-112-0/+7
* [AVX512] Fix miscompile for unpackAdam Nemet2014-09-111-56/+37
* Move constant-sized bitvector to the stack.Benjamin Kramer2014-09-111-2/+2
* R600: Add cmpxchg instruction for evergreenAaron Watry2014-09-112-5/+29
* R600: Add LDS_WRXCHG[_RET] instructions for Evergreen.Aaron Watry2014-09-111-0/+4
* R600: Add LDS_MIN_[U]INT[_RET] instructions for EvergreenAaron Watry2014-09-111-0/+8
* R600: Add LDS_XOR[_RET] instructions for EvergreenAaron Watry2014-09-111-0/+4
* R600: Add LDS_OR[_RET] instructions for EvergreenAaron Watry2014-09-111-0/+4
* R600: Add LDS_AND[_RET] instructions for EvergreenAaron Watry2014-09-111-0/+4
* R600: Add LDS_MAX_[U]INT[_RET] instructions for EvergreenAaron Watry2014-09-111-0/+8
* R600/SI: Fix losing chain when fixing reg class of loads.Matt Arsenault2014-09-101-6/+14
* R600/SI: Report offset in correct units for st64 DS instructionsMatt Arsenault2014-09-101-0/+15
* R600: Custom lower fremMatt Arsenault2014-09-102-0/+20
* Add doInitialization/doFinalization to DataLayoutPass.Rafael Espindola2014-09-102-2/+2
* [AArch64] Revert r216141 for cycloneGerolf Hoflehner2014-09-101-1/+1
* Rename getMaximumUnrollFactor -> getMaxInterleaveFactor; also rename option n...Sanjay Patel2014-09-105-9/+9
* [AArch64] Address Chad's post commit review comments for r217504 (PBQP experi...Arnaud A. de Grandmaison2014-09-101-11/+10
* [AArch64] Pacify lld buildbot complaining about an unused static function in ...Arnaud A. de Grandmaison2014-09-101-0/+2
* [AArch64] Add experimental PBQP supportArnaud A. de Grandmaison2014-09-105-2/+435
* [AArch 64] Use a constant pool load for weak symbol references whenAsiri Rathnayake2014-09-104-6/+39
* Add missing HWEncoding to base register class.Sid Manning2014-09-101-8/+10
* ARM: don't size-reduce STMs using the LR register.Tim Northover2014-09-101-1/+1
* [mips] Remove inverted predicates from MipsSubtarget that were only used by M...Daniel Sanders2014-09-102-14/+15
* [mips] Return an ArrayRef from MipsCC::intArgRegs() and remove MipsCC::numInt...Daniel Sanders2014-09-102-24/+19
* [asan-assembly-instrumentation] Added CFI directives to the generated instrum...Yuri Gorshenin2014-09-103-1/+62
* Drop the W postfix on the 16-bit registers.Job Noorman2014-09-107-196/+196
* [MIPS] Add aliases for sync instruction used by Octeon CPUKai Nacke2014-09-101-0/+6
* Use cast to MVT instead of EVT on a couple calls to getSizeInBits.Craig Topper2014-09-101-2/+2
* Add a scheduling model for AMD 16H Jaguar (btver2).Sanjay Patel2014-09-093-4/+350
* [mips] Add assembler support for .set mips0 directive.Toma Tabacu2014-09-093-0/+21
* [mips] Move MipsTargetLowering::MipsCC::regSize() to MipsSubtarget::getGPRSiz...Daniel Sanders2014-09-093-32/+32
* [x32] Emit callq for CALLpcrel32Pavel Chupin2014-09-093-4/+19
* [mips] Don't cache IsO32 and IsFP64 in MipsTargetLowering::MipsCCDaniel Sanders2014-09-092-23/+28
* [mips] Add assembler support for .set push/pop directive.Toma Tabacu2014-09-093-17/+95
* ARM: Negative offset support problemRenato Golin2014-09-091-2/+2
* Set trunc store action to Expand for all X86 targets.Bob Wilson2014-09-091-2/+2
* [AArch64] Enabled AA support for Cortex-A57.Chad Rosier2014-09-081-1/+1
* R600/SI: Fix assertion from copying a TargetGlobalAddressMatt Arsenault2014-09-081-1/+2
* R600/SI: Replace LDS atomics with no return versionsMatt Arsenault2014-09-083-19/+35
* R600/SI: Add InstrMapping for noret atomics.Matt Arsenault2014-09-083-50/+78
* [AArch64] Improve AA to remove unneeded edges in the AA MI scheduling graph.Chad Rosier2014-09-082-0/+140
* [AArch64] Enabled AA support for Cortex-A53.Chad Rosier2014-09-081-0/+2
* Spelling correctionSid Manning2014-09-081-2/+2
* [x86] Revert my over-eager commit in r217332.Chandler Carruth2014-09-071-25/+9
* [x86] Tweak the rules surrounding 0,0 and 1,1 v2f64 shuffles and addChandler Carruth2014-09-071-9/+25
* R600/SI: Fix register class for some 64-bit atomicsMatt Arsenault2014-09-071-5/+5
* [x86] Fix a pretty horrible bug and inconsistency in the x86 asmChandler Carruth2014-09-066-53/+20
* [x86] Fix an embarressing bug in the INSERTPS formation code. The maskChandler Carruth2014-09-051-3/+4
* [mips] Change Feature-related types from unsigned to uint64_t in MipsAsmParse...Toma Tabacu2014-09-051-2/+2
OpenPOWER on IntegriCloud