| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Previous commit message should refer to 104308. | Dale Johannesen | 2010-05-21 | 1 | -1/+1 |
| * | Fix two bugs in 104348: | Dale Johannesen | 2010-05-21 | 1 | -3/+9 |
| * | now that fp reg kill insertion stuff happens as a separate | Chris Lattner | 2010-05-21 | 1 | -38/+33 |
| * | Use less evil form of switch stmt. | Chris Lattner | 2010-05-21 | 1 | -2/+4 |
| * | use continue to reduce nesting. | Chris Lattner | 2010-05-21 | 1 | -14/+17 |
| * | pull a nested loop of this pass out to its own function, | Chris Lattner | 2010-05-21 | 1 | -42/+55 |
| * | modernize this pass a bit, fit in 80 columns. | Chris Lattner | 2010-05-21 | 1 | -6/+9 |
| * | Currently, createMachOStreamer() is invoked directly in llvm-mc which | Matt Fleming | 2010-05-21 | 1 | -0/+20 |
| * | Split out the x86_32 an x86_64 ELF backends as they handle ELF | Matt Fleming | 2010-05-21 | 1 | -2/+14 |
| * | Fix i64->f64 conversion, x86-64, -no-sse. A bit | Dale Johannesen | 2010-05-21 | 2 | -0/+33 |
| * | Change ARM scheduling default to list-hybrid if the target supports floating ... | Evan Cheng | 2010-05-21 | 1 | -1/+4 |
| * | Allow targets more controls on what nodes are scheduled by reg pressure, what... | Evan Cheng | 2010-05-20 | 2 | -0/+12 |
| * | MC/X86: Add movq alias for movabsq, to allow matching 64-bit immediates with ... | Daniel Dunbar | 2010-05-20 | 1 | -0/+7 |
| * | X86: Model i64i32imm properly, as a subclass of all immediates. | Daniel Dunbar | 2010-05-20 | 3 | -2/+29 |
| * | X86: Fix immediate type of FOO64i32 operations. | Daniel Dunbar | 2010-05-20 | 1 | -10/+10 |
| * | Handle Neon v2f64 and v2i64 vector shuffles as register copies. | Bob Wilson | 2010-05-20 | 1 | -0/+18 |
| * | Delete MMX_MOVQ64gmr. It was the same as MMX_MOVQ64mr, but it didn't | Dan Gohman | 2010-05-20 | 1 | -3/+0 |
| * | The PPC MFCR instruction implicitly uses all 8 of the CR | Dale Johannesen | 2010-05-20 | 5 | -21/+24 |
| * | Fix assembly parsing and encoding of the pushf and popf family of | Dan Gohman | 2010-05-20 | 4 | -10/+31 |
| * | Set neverHasSideEffects on 64-bit pushf and popf, for consistency with | Dan Gohman | 2010-05-20 | 1 | -2/+2 |
| * | Define the x86 pause instruction. | Dan Gohman | 2010-05-20 | 1 | -0/+4 |
| * | Fix the sfence instruction to use MRM_F8 instead of MRM7r, since it | Dan Gohman | 2010-05-20 | 1 | -1/+2 |
| * | Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMa... | Evan Cheng | 2010-05-19 | 6 | -6/+6 |
| * | MC/X86: Add missing entry for TAILJMP_1 to getRelaxedOpcode(). | Daniel Dunbar | 2010-05-19 | 1 | -0/+1 |
| * | MC/X86: Lower TAILCALLd[64] to JMP_1, to allow relaxation and to avoid same | Daniel Dunbar | 2010-05-19 | 2 | -0/+17 |
| * | MC/X86: Strip spurious operands from TAILJMPr64 as we do for CALL64r and | Daniel Dunbar | 2010-05-19 | 1 | -3/+5 |
| * | t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoi... | Evan Cheng | 2010-05-19 | 2 | -0/+2 |
| * | Use 'adr' for LEApcrel and LEApcrel. Mark LEApcrel re-materializable. | Evan Cheng | 2010-05-19 | 1 | -12/+4 |
| * | MC/X86: Lower MOV{8,16,32,64}{rm,mr} to fixed-register forms, as appropriate. | Daniel Dunbar | 2010-05-19 | 1 | -9/+50 |
| * | Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These ... | Evan Cheng | 2010-05-19 | 5 | -35/+37 |
| * | Target instruction selection should copy memoperands. | Evan Cheng | 2010-05-19 | 1 | -3/+11 |
| * | MC/X86: Strip spurious operands from CALL64r as we do for CALL64pcrel32, to | Daniel Dunbar | 2010-05-19 | 1 | -6/+8 |
| * | Mark a few more pattern-less instructions with neverHasSideEffects. This is e... | Evan Cheng | 2010-05-19 | 3 | -0/+12 |
| * | Factor out the code for picking integer arithmetic with immediate | Dan Gohman | 2010-05-19 | 1 | -15/+32 |
| * | Teach mode load folding and unfolding code about CMP32ri8 and friends. | Dan Gohman | 2010-05-18 | 1 | -3/+9 |
| * | Don't eliminate frame pointers from leaf functions if "--disable-fp-elim" is | Bill Wendling | 2010-05-18 | 1 | -1/+1 |
| * | When converting a test to a cmp to fold a load, use the cmp that has an | Dan Gohman | 2010-05-18 | 1 | -3/+3 |
| * | make mcinstlower remove all but the first operand to CALL64pcrel32. | Chris Lattner | 2010-05-18 | 1 | -1/+11 |
| * | Sink dag combine's post index load / store code that swap base ptr and index ... | Evan Cheng | 2010-05-18 | 1 | -1/+15 |
| * | MC/X86: Implement custom lowering to make sure we match things like | Daniel Dunbar | 2010-05-18 | 1 | -0/+68 |
| * | ARMBaseRegisterInfo::estimateRSStackSizeLimit() could return prematurely with a | Jakob Stoklund Olesen | 2010-05-17 | 1 | -16/+17 |
| * | - Set the "HasCalls" flag after instruction selection is finished. | Bill Wendling | 2010-05-17 | 1 | -3/+4 |
| * | vmov of immediates are trivially re-materializable. | Evan Cheng | 2010-05-17 | 1 | -0/+2 |
| * | MC: Add dyn_cast support to MCSection. | Daniel Dunbar | 2010-05-17 | 1 | -1/+7 |
| * | Add some section and constant support for darwin TLS. | Eric Christopher | 2010-05-17 | 1 | -1/+2 |
| * | Fix a regression in 464.h264 for thumb1 and thumb2 nightly tests. | Bob Wilson | 2010-05-17 | 1 | -1/+1 |
| * | Turn on -neon-reg-sequence by default. | Evan Cheng | 2010-05-17 | 1 | -1/+2 |
| * | No reason not to run the NEON domain croassing fix up pass in thumb2 mode. | Evan Cheng | 2010-05-17 | 1 | -1/+1 |
| * | Revert 103911; it broke a test that expects bitconvert | Dale Johannesen | 2010-05-16 | 1 | -4/+0 |
| * | Make x86-64 64-bit bitconvert work when SSE is not available. | Dale Johannesen | 2010-05-16 | 1 | -0/+4 |
