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* * Correct 64-bit version: blr 1 (not 0)Misha Brukman2004-08-121-2/+2
| | | | | | * BuildMI() can build 0-param instructions (e.g., NOP) llvm-svn: 15681
* * Print out full names for non-GPR or -FPR registersMisha Brukman2004-08-121-3/+5
| | | | | | * BuildMI() really *does* handle 0 params! llvm-svn: 15680
* * Pointers are 8 bytes, hence cLong type on 64-bit PPCMisha Brukman2004-08-121-6/+8
| | | | | | * Fix loading of GlobalValues llvm-svn: 15678
* Eliminate special-casing 14-bit immediate load/store opcodesMisha Brukman2004-08-121-16/+5
| | | | llvm-svn: 15677
* Correctly print out ASCII literal strings on AIXMisha Brukman2004-08-121-22/+48
| | | | llvm-svn: 15674
* Mark R2 as available for allocation on Darwin/PPC32, but not AIX/PPC64Misha Brukman2004-08-121-3/+6
| | | | llvm-svn: 15673
* * Move AIX into the llvm namespace to be accessed from RegisterInfoMisha Brukman2004-08-112-11/+15
| | | | | | | * Mark InstrInfo with 32 vs. 64 bit flag * Enable the 64-bit isel and asm printer llvm-svn: 15672
* Set the is64bit flag and propagate it to PowerPCRegisterInfoMisha Brukman2004-08-112-3/+6
| | | | llvm-svn: 15671
* * Set the is64bit boolean flag in PowerPCRegisterInfoMisha Brukman2004-08-113-18/+30
| | | | | | | | * Doubles are 8 bytes in 64-bit PowerPC, and use the general register class * Use double-word loads and stores for restoring from/saving to stack * Do not allocate R2 if compiling for AIX llvm-svn: 15670
* 64-bit instruction selector and AIX-specific 64-bit asm printerMisha Brukman2004-08-113-1/+3887
| | | | llvm-svn: 15669
* Fix names of 64-bit CMP*D* opcodes, add LWA and STD* opcodesMisha Brukman2004-08-111-4/+10
| | | | llvm-svn: 15668
* Add support for 64-bit CMPDI, CMPLDI, and CMPLD opcodesMisha Brukman2004-08-112-3/+6
| | | | llvm-svn: 15667
* Add doubleword load/store (64-bit only).Misha Brukman2004-08-112-5/+29
| | | | llvm-svn: 15665
* Hyphenate ##-bit and remove first-person from comments.Misha Brukman2004-08-111-4/+4
| | | | llvm-svn: 15663
* Clean up 32/64bit and Darwin/AIX split. Next steps: 64 bit ISel, AIX asm ↵Nate Begeman2004-08-1112-307/+140
| | | | | | printer. llvm-svn: 15662
* Fix a case where constantexprs could leak into the PPC isel.Chris Lattner2004-08-111-1/+4
| | | | llvm-svn: 15661
* Remove a bunch of ad-hoc target-specific flags that were only used by theChris Lattner2004-08-113-57/+16
| | | | | | old asmprinter. llvm-svn: 15660
* Remove a dead methodChris Lattner2004-08-111-32/+0
| | | | llvm-svn: 15659
* Finally, the entire instruction asmprinter is now generated from tblgen, woo!Chris Lattner2004-08-111-296/+8
| | | | llvm-svn: 15658
* Add asmprintergen support for the last X86 instruction that needs it: ↵Chris Lattner2004-08-112-1/+12
| | | | | | pcrelative calls. llvm-svn: 15657
* This file is long deadChris Lattner2004-08-111-241/+0
| | | | llvm-svn: 15656
* Scrunch memoperands, add a few more for floating point memopsChris Lattner2004-08-111-68/+61
| | | | | | Eliminate the FPI*m classes, converting them to use FPI instead. llvm-svn: 15655
* Move hacks upChris Lattner2004-08-111-32/+30
| | | | llvm-svn: 15654
* Make FPI take asm string and operand listChris Lattner2004-08-111-39/+33
| | | | llvm-svn: 15653
* Nuke the Im*i* patterns, by asmprintergenifying all users.Chris Lattner2004-08-111-70/+73
| | | | llvm-svn: 15652
* X86 instructions that read-modify-write memory are not LLVM two-address ↵Chris Lattner2004-08-111-78/+60
| | | | | | instructions. llvm-svn: 15651
* Get rid of the Im8, Im16, Im32 classes, converting more instructions over toChris Lattner2004-08-111-224/+300
| | | | | | asmprintergeneration llvm-svn: 15650
* Fix 255.vortex by using getClassB instead of getClassNate Begeman2004-08-111-2/+1
| | | | llvm-svn: 15648
* Remove dead methodChris Lattner2004-08-111-13/+0
| | | | llvm-svn: 15647
* Convert asmprinter to new style of instruction printerChris Lattner2004-08-112-9/+50
| | | | | | Start asmprintergen'ifying machine instrs with memory operands. llvm-svn: 15646
* Fill out immediate operand classes, add a new Operand classChris Lattner2004-08-111-4/+14
| | | | llvm-svn: 15642
* Breaking up the PowerPC target into 32- and 64-bit subparts, Part III: the rest.Misha Brukman2004-08-118-4348/+26
| | | | llvm-svn: 15636
* Breaking up the PowerPC target into 32- and 64-bit subparts: Part II: 64-bit.Misha Brukman2004-08-115-0/+269
| | | | llvm-svn: 15635
* Breaking up the PowerPC target into 32- and 64-bit subparts, Part I: 32-bit.Misha Brukman2004-08-117-29/+277
| | | | llvm-svn: 15634
* Implement new constructor.Misha Brukman2004-08-101-0/+7
| | | | llvm-svn: 15633
* Renamed PPC32 (namespace for regs, opcodes) to PPC to include 64-bit targetsMisha Brukman2004-08-1011-856/+856
| | | | llvm-svn: 15631
* * Fix file header to use tablegen emacs mode instead of c++Misha Brukman2004-08-101-2/+3
| | | | | | * Wrap long line to 80 cols llvm-svn: 15630
* This is purely a formatting patch that gets us closer to the mecca of fittingChris Lattner2004-08-101-60/+103
| | | | | | X86InstrInfo.td into 80 columns llvm-svn: 15629
* Drop the first argument of FPI, and asmprinterify fxchChris Lattner2004-08-101-28/+32
| | | | llvm-svn: 15628
* Fix casts of float to unsigned longNate Begeman2004-08-104-69/+176
| | | | | | | | Replace STDX (store 64 bit int indexed) with STFDX (store double indexed) Fix latent bug in indexed load generation Generate indexed loads and stores in many more cases llvm-svn: 15626
* Fix file header comment: update filename, set tablegen emacs mode.Misha Brukman2004-08-101-1/+1
| | | | llvm-svn: 15625
* This purely mechanical patch gives the "I" tblgen class operand list and asmChris Lattner2004-08-101-312/+239
| | | | | | string operands, and adjusts all users to pass them in instead of using II. llvm-svn: 15624
* Convert Ii32 instructions over to use the asmprinter generatorChris Lattner2004-08-101-16/+16
| | | | llvm-svn: 15621
* DForm 5/6 extended mneumonics take 3 arguments.Misha Brukman2004-08-101-0/+10
| | | | llvm-svn: 15620
* * Instruction definitions moved to SparcV9InstrInfo.td for consistencyMisha Brukman2004-08-102-753/+805
| | | | | | * Defined PHI instruction and SparcV9 subclass of Target llvm-svn: 15615
* Renamed SparcV9_Reg.td -> SparcV9RegisterInfo.td for consistency.Misha Brukman2004-08-101-0/+0
| | | | llvm-svn: 15614
* Fix DForm_4: format is `op r, r, i'Misha Brukman2004-08-101-2/+3
| | | | llvm-svn: 15613
* Fix comment header, specify type of file `tablegen'.Misha Brukman2004-08-103-3/+3
| | | | llvm-svn: 15612
* Convert the Ii16 instructions overChris Lattner2004-08-101-23/+26
| | | | llvm-svn: 15606
* Convert all Ii8 instructions over to the autogenerated asmprinter.Chris Lattner2004-08-101-36/+36
| | | | llvm-svn: 15605
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