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| author | Misha Brukman <brukman+llvm@gmail.com> | 2004-08-12 00:10:01 +0000 |
|---|---|---|
| committer | Misha Brukman <brukman+llvm@gmail.com> | 2004-08-12 00:10:01 +0000 |
| commit | 345399b06ec4bc3e8ee97e148c69fca9fd9516e0 (patch) | |
| tree | 7f44373c9597648369ab685165d51a7f34e71707 /llvm/lib/Target | |
| parent | c94c0f75f4593f1d5948fee7331b5b70ba2a84f8 (diff) | |
| download | bcm5719-llvm-345399b06ec4bc3e8ee97e148c69fca9fd9516e0.tar.gz bcm5719-llvm-345399b06ec4bc3e8ee97e148c69fca9fd9516e0.zip | |
Mark R2 as available for allocation on Darwin/PPC32, but not AIX/PPC64
llvm-svn: 15673
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PowerPCRegisterInfo.td | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/llvm/lib/Target/PowerPC/PowerPCRegisterInfo.td b/llvm/lib/Target/PowerPC/PowerPCRegisterInfo.td index c103dd6f374..78186cfc784 100644 --- a/llvm/lib/Target/PowerPC/PowerPCRegisterInfo.td +++ b/llvm/lib/Target/PowerPC/PowerPCRegisterInfo.td @@ -77,13 +77,16 @@ def TBU : SPR<5>; // then nonvolatiles in reverse order since stmw/lmw save from rN to r31 def GPRC : RegisterClass<i32, 4, - [R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, + [R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R31, R30, R29, R28, R27, R26, R25, R24, R23, R22, R21, R20, R19, R18, R17, - R16, R15, R14, R13, R0, R2, R1, LR]> + R16, R15, R14, R13, R0, R1, LR]> { let Methods = [{ + iterator allocation_order_begin(MachineFunction &MF) const { + return begin() + (AIX ? 1 : 0); + } iterator allocation_order_end(MachineFunction &MF) const { - return end() - (AIX ? 4 : 3); + return end() - 3; } }]; } |
