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* Implement __builtin_thread_pointerAdhemerval Zanella2015-07-282-0/+19
* [X86] Remove mergeSPUpdatesUp()Michael Kuperstein2015-07-281-25/+1
* [X86][SSE] Use bitmasks instead of shuffles where possible.Simon Pilgrim2015-07-281-0/+8
* AVX512: Implemented encoding and intrinsics for VGETEXPSS/D instructionsIgor Breger2015-07-283-1/+8
* fix invalid load folding with SSE/AVX FP logical instructions (PR22371)Sanjay Patel2015-07-283-46/+59
* WebAssembly: add a generic CPUJF Bastien2015-07-271-0/+3
* WebAssembly: more MCAsmInfo nits.JF Bastien2015-07-271-5/+1
* - Added support for parsing HWDiv features using Target Parser.Alexandros Lamprineas2015-07-272-3/+3
* [llvm-mc] Pushing plumbing through for --fatal-warnings flag.Colin LeMahieu2015-07-278-8/+8
* remove unnecessary forward declaration; NFCSanjay Patel2015-07-271-16/+12
* don't repeat function names in comments; NFCSanjay Patel2015-07-271-61/+49
* WebAssembly: minor MCAsmInfo fixesJF Bastien2015-07-271-1/+8
* Revert "[PeepholeOptimizer] Look through PHIs to find additional register sou...Bruno Cardoso Lopes2015-07-271-2/+1
* [AArch64] Remove check for Darwin that was needed to decide if x18 shouldAkira Hatanaka2015-07-271-9/+7
* Fix ODR violation. NFC.Diego Novillo2015-07-271-4/+4
* AMDGPU: don't match vgpr loads for constant loadsMarek Olsak2015-07-271-3/+0
* fix typo and spacing; NFCSanjay Patel2015-07-271-2/+2
* Revert "Add const to some Type* parameters which didn't need to be mutable. ...Pete Cooper2015-07-272-10/+10
* [PeepholeOptimizer] Look through PHIs to find additional register sourcesBruno Cardoso Lopes2015-07-271-1/+2
* [ARM/AArch64] Fix cost model for interleaved accessesSilviu Baranga2015-07-272-2/+2
* [X86] Reordered lowerVectorShuffleAsBitMask before lowerVectorShuffleAsBlend....Simon Pilgrim2015-07-271-86/+86
* AMDGPU/SI: Fix the V_FRACT_F64 SI bug workaroundMarek Olsak2015-07-271-2/+2
* Avoid using uncommon acronym "MSROM".Sean Silva2015-07-271-2/+2
* Implemented encoding and intrinsics of the following instructionsIgor Breger2015-07-263-96/+134
* [AArch64][FastISel] Always use an AND instruction when truncating to non-lega...Juergen Ributzka2015-07-251-31/+24
* Fix PPCMaterializeInt to check the size of the integer based on theEric Christopher2015-07-251-9/+14
* PPCMaterializeInt should only take a ConstantInt so represent this in the pro...Eric Christopher2015-07-251-12/+9
* [AArch64] Define subtarget feature "reserve-x18", which is used to decideAkira Hatanaka2015-07-254-10/+18
* Use make_range(rbegin(), rend()) to allow foreach loops. NFC.Pete Cooper2015-07-241-4/+3
* Add const to some Type* parameters which didn't need to be mutable. NFC.Pete Cooper2015-07-242-10/+10
* Use foreach loops for StructType::elements(). NFC.Pete Cooper2015-07-242-4/+4
* AVX-512: Implemented encoding , DAG lowering and intrinsics for Integer Trunc...Igor Breger2015-07-246-108/+522
* Remove access to the DataLayout in the TargetMachineMehdi Amini2015-07-244-24/+29
* fix wrong comment; NFCSanjay Patel2015-07-241-1/+1
* [ARM] - Fix lowering of shufflevectors in AArch32Luke Cheeseman2015-07-241-38/+127
* When lowering vector shifts a check is performed to see if the value to shift byLuke Cheeseman2015-07-242-17/+14
* Revert "Remove access to the DataLayout in the TargetMachine"Mehdi Amini2015-07-244-29/+24
* [bpf] initial support for debug_infoAlexei Starovoitov2015-07-243-9/+22
* Remove access to the DataLayout in the TargetMachineMehdi Amini2015-07-244-24/+29
* test commit, only added one spaceLawrence Hu2015-07-231-1/+1
* [ARM] Register (existing) ARMLoadStoreOpt pass with LLVM pass manager.David Gross2015-07-231-2/+12
* Test commit.David Gross2015-07-231-0/+1
* X86: Use dyn_cast instead of isa+cast, NFCDuncan P. N. Exon Smith2015-07-231-5/+6
* This patch eanble register coalescing to coalesce the following:Weiming Zhao2015-07-231-0/+14
* [X86] Allow load folding into PUSH instructionsMichael Kuperstein2015-07-233-9/+27
* [X86] Fix order of operands for ins and outs instructions when parsing intel ...Michael Kuperstein2015-07-231-28/+28
* X86: Fixed assertion failure in 32-bit modeElena Demikhovsky2015-07-231-2/+3
* Revert r242990: "AVX-512: Implemented encoding , DAG lowering and ..."Chandler Carruth2015-07-235-478/+94
* AVX-512: Implemented encoding , DAG lowering and intrinsics for Integer Trunc...Igor Breger2015-07-235-94/+478
* AVX : Fix ISA disabling in case AVX512VL , some instructions should be disabl...Igor Breger2015-07-232-17/+18
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