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* [AArch64] Favor extended reg patterns for subGeoff Berry2015-07-311-0/+2
* Refactor: Simplify boolean conditional return statements in lib/Target/NVPTXJingyue Wu2015-07-313-37/+15
* AMDGPU: Fix v16i32 to v16i8 truncstoreMatt Arsenault2015-07-311-0/+1
* AMDGPU/SI: Set DwarfRegNumMatt Arsenault2015-07-311-6/+14
* AMDGPU/SI: Remove unused pattern for f32 constant loadsTom Stellard2015-07-311-1/+0
* [ARM] Lower modulo operation to generate __aeabi_divmod on AndroidSumanth Gundapaneni2015-07-311-3/+4
* fix memcpy/memset/memmove lowering when optimizing for sizeSanjay Patel2015-07-302-8/+6
* AMDGPU: Set SubRegIndex size and offsetMatt Arsenault2015-07-301-2/+1
* AMDGPU: Fix unreachable when emitting binary debug infoMatt Arsenault2015-07-301-1/+33
* AMDGPU/SI: Simplify moveSMRDToVALU()Tom Stellard2015-07-301-11/+9
* AMDGPU/SI: Remove isTriviallyReMaterializable() function from SIInstrInfoTom Stellard2015-07-302-15/+0
* [mips][FastISel] Remove hidden mips-fast-isel option.Vasileios Kalintiris2015-07-301-6/+2
* [mips][FastISel] Apply only zero-extension to constants prior to their materi...Vasileios Kalintiris2015-07-301-6/+1
* [X86] Recognize "flags" as an identifier, not a register in Intel-syntax inli...Michael Kuperstein2015-07-301-0/+5
* push fast-math check for machine-combiner reassociations into instruction-typ...Sanjay Patel2015-07-301-7/+4
* Fix typo "fuction" noticed in comments in AssumptionCache.h, and also all the...Nick Lewycky2015-07-2913-13/+13
* Rename hasCompatibleFunctionAttributes->areInlineCompatible basedEric Christopher2015-07-292-4/+4
* [X86][SSE] Keep 32-bit target i64 vector shifts on SSE unit.Simon Pilgrim2015-07-291-15/+31
* AArch64: use 32-bit MOV rather than UBFX to truncate registers.Tim Northover2015-07-291-3/+3
* [X86][SSE] Vectorize i64 ASHR operationsSimon Pilgrim2015-07-292-4/+18
* Roll forward r242871Jingyue Wu2015-07-291-1/+0
* Revert "[PeepholeOptimizer] Look through PHIs to find additional register sou...Bruno Cardoso Lopes2015-07-291-2/+1
* AArch64: use AddressingModes.h accessors for compare shiftsTim Northover2015-07-291-4/+5
* Temporarily revert r242871Jingyue Wu2015-07-291-0/+1
* [PPC] Fix PR24216: Don't generate splat for misaligned shuffle maskBill Schmidt2015-07-291-0/+5
* [AArch64] Define subtarget feature strict-align.Akira Hatanaka2015-07-295-31/+25
* Fix broken ArrayRef conversion from r243497.Alex Lorenz2015-07-281-1/+1
* fix TLI's combineRepeatedFPDivisors interface to return the minimum user thre...Sanjay Patel2015-07-286-10/+10
* MIR Serialization: Serialize the target index machine operands.Alex Lorenz2015-07-282-0/+14
* [ARM] Define subtarget feature strict-align.Akira Hatanaka2015-07-283-55/+9
* AArch64: be careful of large immediates when optimising cmps.Tim Northover2015-07-281-5/+12
* [PeepholeOptimizer] Look through PHIs to find additional register sourcesBruno Cardoso Lopes2015-07-281-1/+2
* [mips][FastISel] Fix call lowering by bailing out on "fastcc" calls.Vasileios Kalintiris2015-07-281-0/+9
* [mips][FastISel] Fix generated code for IR's select instruction.Vasileios Kalintiris2015-07-281-1/+8
* AMDGPU: Don't try to use LDS/vector for private if pointer value storedMatt Arsenault2015-07-281-4/+14
* AMDGPU: Fix crash if called function is a bitcastMatt Arsenault2015-07-281-1/+6
* AMDGPU: Fix return type of getImplicitParameterOffset.Matt Arsenault2015-07-281-1/+1
* WebAssembly: MCAsmInfo only has one syntax variant for now.JF Bastien2015-07-281-5/+3
* Implement target independent TLS compatible with glibc's emutls.c.Chih-Hung Hsieh2015-07-287-0/+19
* [AArch64] Match float round and convert to int instructions.Geoff Berry2015-07-281-12/+116
* Implement __builtin_thread_pointerAdhemerval Zanella2015-07-282-0/+19
* [X86] Remove mergeSPUpdatesUp()Michael Kuperstein2015-07-281-25/+1
* [X86][SSE] Use bitmasks instead of shuffles where possible.Simon Pilgrim2015-07-281-0/+8
* AVX512: Implemented encoding and intrinsics for VGETEXPSS/D instructionsIgor Breger2015-07-283-1/+8
* fix invalid load folding with SSE/AVX FP logical instructions (PR22371)Sanjay Patel2015-07-283-46/+59
* WebAssembly: add a generic CPUJF Bastien2015-07-271-0/+3
* WebAssembly: more MCAsmInfo nits.JF Bastien2015-07-271-5/+1
* - Added support for parsing HWDiv features using Target Parser.Alexandros Lamprineas2015-07-272-3/+3
* [llvm-mc] Pushing plumbing through for --fatal-warnings flag.Colin LeMahieu2015-07-278-8/+8
* remove unnecessary forward declaration; NFCSanjay Patel2015-07-271-16/+12
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