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* fold immediates into stores in simple cases, this produces diffs like Chris Lattner2008-10-151-30/+46
| | | | | | | | | | this: - movl $0, %eax - movl %eax, _yy_n_chars + movl $0, _yy_n_chars llvm-svn: 57555
* fold compare of null pointer into compare with 0.Chris Lattner2008-10-151-0/+4
| | | | llvm-svn: 57553
* Some minor cleanups:Chris Lattner2008-10-151-40/+30
| | | | | | | | | | | | | 1. Compute action in X86SelectSelect based on MVT instead of type. 2. Use TLI.getValueType(..) instead of MVT::getVT(..) because the former handles pointers and the later doesn't. 3. Don't pass TLI into isTypeLegal, since it already has access to it as an ivar. #2 gives fast isel some minor new functionality: handling load/stores of pointers. llvm-svn: 57552
* Use switch on VT instead of Type* comparisons.Chris Lattner2008-10-151-19/+18
| | | | llvm-svn: 57551
* Use X86FastEmitCompare for FCMP_OEQ and FCMP_UNE: it doesn'tChris Lattner2008-10-151-17/+8
| | | | | | change the generated code, but makes the code simpler. llvm-svn: 57550
* refactor compare emission out into a new X86FastEmitCompare method,Chris Lattner2008-10-151-29/+49
| | | | | | | | which makes it easy to share the compare/imm folding logic with 'setcc'. This shaves a bunch of instructions off the common select case, which happens a lot in llvm-gcc. llvm-svn: 57549
* Fold immediates into compares when possible, producing "cmp $4, %eax" instead ofChris Lattner2008-10-151-3/+36
| | | | | | loading 4 into a register and then doing the compare. llvm-svn: 57548
* more minor refactoring of X86SelectBranch, no functionality change.Chris Lattner2008-10-151-13/+11
| | | | llvm-svn: 57547
* factor buildmi calls in X86SelectBranchChris Lattner2008-10-151-89/+30
| | | | llvm-svn: 57546
* factor some more BuildMI's in X86SelectCmpChris Lattner2008-10-151-92/+30
| | | | llvm-svn: 57545
* factor some BuildMI calls, no functionality change.Chris Lattner2008-10-151-46/+56
| | | | llvm-svn: 57544
* - Add target lowering hooks that specify which setcc conditions are illegal,Evan Cheng2008-10-151-21/+11
| | | | | | | | | | | i.e. conditions that cannot be checked with a single instruction. For example, SETONE and SETUEQ on x86. - Teach legalizer to implement *illegal* setcc as a and / or of a number of legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ. - Move x86 target over. llvm-svn: 57542
* FastISel support for exception-handling constructs.Dan Gohman2008-10-143-9/+40
| | | | | | | | | - Move the EH landing-pad code and adjust it so that it works with FastISel as well as with SDISel. - Add FastISel support for @llvm.eh.exception and @llvm.eh.selector. llvm-svn: 57539
* Accept -march=i586, because gcc does (a synonymDale Johannesen2008-10-141-0/+1
| | | | | | | | for pentium). Fixes gcc.target/i386/20000720-1.c gcc.target/i386/pr26826.c llvm-svn: 57528
* Rename LoadX to LoadExt.Evan Cheng2008-10-149-35/+35
| | | | llvm-svn: 57526
* Update ARM Insn encoding to get endian-ness to match the documentation (31-0 ↵Jim Grosbach2008-10-142-61/+57
| | | | | | left to right) llvm-svn: 57524
* Fix command-line option printing to print two spaces where needed,Dan Gohman2008-10-1414-27/+27
| | | | | | | | | instead of requiring all "short description" strings to begin with two spaces. This makes these strings less mysterious, and it fixes some cases where short description strings mistakenly did not begin with two spaces. llvm-svn: 57521
* Fix indentation.Evan Cheng2008-10-141-2/+2
| | | | llvm-svn: 57508
* When doing the very-late shift-and address-mode optimization,Dan Gohman2008-10-131-0/+3
| | | | | | | | | | | | | | create a new DAG node to represent the new shift to keep the DAG consistent, even though it'll almost always be folded into the address. If a user of the resulting address has multiple uses, the nodes may get revisited by a later MatchAddress call, in which case DAG inconsistencies do matter. This fixes PR2849. llvm-svn: 57465
* Update size of inst correctly with segment override.Anton Korobeynikov2008-10-122-0/+12
| | | | llvm-svn: 57414
* Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's asChris Lattner2008-10-1117-63/+50
| | | | | | | parameters instead of raw Constants. This prevents the constants from being selected by the isel pass, fixing PR2735. llvm-svn: 57385
* Fix comment typo.Duncan Sands2008-10-111-1/+1
| | | | llvm-svn: 57381
* Add ability to override segment (mostly for code emitter purposes).Anton Korobeynikov2008-10-114-1/+23
| | | | llvm-svn: 57380
* Fix SSE4.1 roundss, roundsd. While the instructions have Dale Johannesen2008-10-101-38/+52
| | | | | | | | the same pattern as roundpd/roundps, the Intel compiler builtins do not: rounds* has an extra operand. Fixes gcc.target/i386/sse4_1-rounds[sd]-[1234].c llvm-svn: 57370
* Fix a thinko and unbreak sparc default CCAnton Korobeynikov2008-10-101-2/+2
| | | | llvm-svn: 57368
* Extend set of return registers on sparc until someone will implement MRV ↵Anton Korobeynikov2008-10-101-3/+3
| | | | | | support there. At least, this will allow libgcc compile, however we are not ABI-compatible with stuff compiled with native gcc. llvm-svn: 57364
* Ignore extra 'r' modifier for nowAnton Korobeynikov2008-10-101-2/+9
| | | | llvm-svn: 57363
* Use expand for smul_lohi for nowAnton Korobeynikov2008-10-101-0/+1
| | | | llvm-svn: 57362
* Add rudimentary support for 'r' register operandAnton Korobeynikov2008-10-102-11/+70
| | | | llvm-svn: 57359
* CleanupAnton Korobeynikov2008-10-101-83/+82
| | | | llvm-svn: 57358
* Add rudimentary asmprinter support for printing inline asm operands for sparc.Anton Korobeynikov2008-10-101-2/+31
| | | | llvm-svn: 57346
* Add dummy 'm' inline asm constraint handler for Sparc. I'm not sure, whether ↵Anton Korobeynikov2008-10-101-0/+26
| | | | | | it is correct, however :) llvm-svn: 57345
* CleanupAnton Korobeynikov2008-10-101-12/+12
| | | | llvm-svn: 57344
* Add a "loses information" return value to APFloat::convertDale Johannesen2008-10-093-4/+9
| | | | | | | and APFloat::convertToInteger. Restore return value to IEEE754. Adjust all users accordingly. llvm-svn: 57329
* Rename APFloat::convertToAPInt to bitcastToAPInt toDale Johannesen2008-10-093-10/+11
| | | | | | | make it clearer what the function does. No functional change. llvm-svn: 57325
* get CodeGen/Alpha/mul128.ll to work.Chris Lattner2008-10-091-0/+2
| | | | llvm-svn: 57318
* (re)Put const weak strings in appropriate section on Darwin.Dale Johannesen2008-10-081-1/+3
| | | | | | g++dg/abi/key2.C llvm-svn: 57309
* Comment to be explicit that the enumeration values for CondCodes matter.Jim Grosbach2008-10-081-0/+2
| | | | llvm-svn: 57295
* Use template to distinguish between function variants.Duncan Sands2008-10-081-5/+14
| | | | | | | | | | | | | | GCC 4.4.0 gives an error on the "int" declaration for example saying that it has already been declared (using the "short" one). Using templates here allow the compiler to distinguish between the function to choose. Also, "llvm/Support/DataTypes.h" was not included, leading to error messages about not knowing "uint32_t" for example. Patch by Samuel Tardieu. llvm-svn: 57292
* Add <cstdio> include where needed by gcc-4.4.Duncan Sands2008-10-082-0/+2
| | | | | | Patch by Samuel Tardieu. llvm-svn: 57291
* Add MBB successors and physreg Uses in the same order thatDan Gohman2008-10-071-7/+4
| | | | | | | SDISel typically adds them in. This makes it a little easier to compare FastISel output with SDISel output. llvm-svn: 57266
* Instead of emitting an implicit use for the super-register ofDan Gohman2008-10-071-6/+10
| | | | | | | | X86::CL that was used, emit an EXTRACT_SUBREG from the CL super-register to CL. This more precisely describes how the CL register is being used. llvm-svn: 57264
* Unconditional branch instruction encoding fix. Needs to use ABI, not AXI, to ↵Jim Grosbach2008-10-071-1/+1
| | | | | | get the proper opcode bits. llvm-svn: 57262
* need ARM.h for ARMCC definitionJim Grosbach2008-10-071-0/+1
| | | | llvm-svn: 57261
* Add an option to enable StrongPHIElimination, for ease of testing.Owen Anderson2008-10-071-0/+7
| | | | llvm-svn: 57259
* Encode the conditional execution predicate when JITing.Jim Grosbach2008-10-072-10/+16
| | | | llvm-svn: 57258
* Model hardwired inputs & outputs of x86 8-bit divides correctly.Dale Johannesen2008-10-071-4/+4
| | | | | | Fixes local RA miscompilation of gcc.c-torture/execute/20020904-1.c -O0. llvm-svn: 57257
* Clarify naming and correct conditional so that CMP and CMN instructions get ↵Jim Grosbach2008-10-071-8/+5
| | | | | | the Rn operand encoded properly llvm-svn: 57252
* Fix Opcode values of CMP and CMNJim Grosbach2008-10-071-4/+4
| | | | llvm-svn: 57251
* Certain patterns involving the "movss" instruction were marked as requiring ↵Anders Carlsson2008-10-071-3/+3
| | | | | | SSE2, when in reality movss is an SSE1 instruction. llvm-svn: 57246
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