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authorDale Johannesen <dalej@apple.com>2008-10-07 18:54:28 +0000
committerDale Johannesen <dalej@apple.com>2008-10-07 18:54:28 +0000
commit422ef88f319bcd585bb8603ef3f01c3fdd32b13b (patch)
tree57d31028e1df0f0c4e496bcdc75226d9d6f5402f /llvm/lib/Target
parent21dca9cbb1c4b1c21c9dbeeb7d3d46d413fda04e (diff)
downloadbcm5719-llvm-422ef88f319bcd585bb8603ef3f01c3fdd32b13b.tar.gz
bcm5719-llvm-422ef88f319bcd585bb8603ef3f01c3fdd32b13b.zip
Model hardwired inputs & outputs of x86 8-bit divides correctly.
Fixes local RA miscompilation of gcc.c-torture/execute/20020904-1.c -O0. llvm-svn: 57257
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.td8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index 691a7cfe7b5..f635d7a542b 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -728,7 +728,7 @@ def IMUL32m : I<0xF7, MRM5m, (outs), (ins i32mem:$src),
}
// unsigned division/remainder
-let Defs = [AX,EFLAGS], Uses = [AL,AH] in
+let Defs = [AL,AH,EFLAGS], Uses = [AX] in
def DIV8r : I<0xF6, MRM6r, (outs), (ins GR8:$src), // AX/r8 = AL,AH
"div{b}\t$src", []>;
let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
@@ -738,7 +738,7 @@ let Defs = [EAX,EDX,EFLAGS], Uses = [EAX,EDX] in
def DIV32r : I<0xF7, MRM6r, (outs), (ins GR32:$src), // EDX:EAX/r32 = EAX,EDX
"div{l}\t$src", []>;
let mayLoad = 1 in {
-let Defs = [AX,EFLAGS], Uses = [AL,AH] in
+let Defs = [AL,AH,EFLAGS], Uses = [AX] in
def DIV8m : I<0xF6, MRM6m, (outs), (ins i8mem:$src), // AX/[mem8] = AL,AH
"div{b}\t$src", []>;
let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
@@ -750,7 +750,7 @@ def DIV32m : I<0xF7, MRM6m, (outs), (ins i32mem:$src), // EDX:EAX/[mem32] =
}
// Signed division/remainder.
-let Defs = [AX,EFLAGS], Uses = [AL,AH] in
+let Defs = [AL,AH,EFLAGS], Uses = [AX] in
def IDIV8r : I<0xF6, MRM7r, (outs), (ins GR8:$src), // AX/r8 = AL,AH
"idiv{b}\t$src", []>;
let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
@@ -760,7 +760,7 @@ let Defs = [EAX,EDX,EFLAGS], Uses = [EAX,EDX] in
def IDIV32r: I<0xF7, MRM7r, (outs), (ins GR32:$src), // EDX:EAX/r32 = EAX,EDX
"idiv{l}\t$src", []>;
let mayLoad = 1, mayLoad = 1 in {
-let Defs = [AX,EFLAGS], Uses = [AL,AH] in
+let Defs = [AL,AH,EFLAGS], Uses = [AX] in
def IDIV8m : I<0xF6, MRM7m, (outs), (ins i8mem:$src), // AX/[mem8] = AL,AH
"idiv{b}\t$src", []>;
let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
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