| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [AVX] Add decode support for VUNPCKLPS/D instructions, both 128-bit | David Greene | 2011-02-28 | 4 | -30/+120 |
| * | Fix the arm's disassembler for blx that was building an MCInst without the | Kevin Enderby | 2011-02-28 | 1 | -1/+13 |
| * | Fix a typo which cause dag combine crash. rdar://9059537. | Evan Cheng | 2011-02-28 | 1 | -1/+1 |
| * | Support for byval parameters on ARM. Will be enabled by a forthcoming | Stuart Hastings | 2011-02-28 | 3 | -9/+47 |
| * | Add branch hinting for SPU. | Kalle Raiskila | 2011-02-28 | 4 | -5/+94 |
| * | Add preliminary support for .f32 in the PTX backend. | Che-Liang Chiou | 2011-02-28 | 5 | -10/+131 |
| * | Silence enum conversion warnings. | Benjamin Kramer | 2011-02-27 | 1 | -2/+2 |
| * | Target/X86: Always emit "push/pop GPRs" in prologue/epilogue and emit "spill/... | NAKAMURA Takumi | 2011-02-27 | 1 | -17/+39 |
| * | Add some DAGCombines for (adde 0, 0, glue), which are useful to optimize lega... | Benjamin Kramer | 2011-02-26 | 1 | -37/+0 |
| * | Allow targets to specify a the type of the RHS of a shift parameterized on th... | Owen Anderson | 2011-02-25 | 16 | -157/+161 |
| * | Roll out r126425 and r126450 to see if it fixes the failures on the buildbots. | Cameron Zwarich | 2011-02-25 | 4 | -11/+1 |
| * | Add patterns to use post-increment addressing for Neon VST1-lane instructions. | Bob Wilson | 2011-02-25 | 3 | -11/+39 |
| * | Fix typo. | Evan Cheng | 2011-02-25 | 1 | -1/+1 |
| * | Each prologue may have multiple vpush instructions to store callee-saved | Evan Cheng | 2011-02-25 | 1 | -2/+14 |
| * | remove command line option debugging hook. | Chris Lattner | 2011-02-24 | 1 | -6/+0 |
| * | Enable DebugInfo support for COFF object files. | Devang Patel | 2011-02-24 | 4 | -1/+11 |
| * | Add XCore intrinsic for eeu instruction. | Richard Osborne | 2011-02-24 | 1 | -0/+4 |
| * | Fix bug in X86 folding / unfolding table. Int_CMPSDrm and Int_CMPSSrm memory | Evan Cheng | 2011-02-24 | 1 | -2/+2 |
| * | Add XCore intrinsic for clre instruction. | Richard Osborne | 2011-02-23 | 1 | -1/+3 |
| * | Add llvm.xcore.waitevent intrinsic. The effect of this intrinsic is to enable | Richard Osborne | 2011-02-23 | 1 | -1/+7 |
| * | Add XCore intrinsic for the setv instruction. | Richard Osborne | 2011-02-23 | 1 | -1/+6 |
| * | Fix format for setc instruction. | Richard Osborne | 2011-02-23 | 1 | -1/+1 |
| * | Add XCore intrinsic for settw instruction. | Richard Osborne | 2011-02-23 | 1 | -1/+5 |
| * | Change VFPNeonA8 definition to make the code easier to read. | Evan Cheng | 2011-02-23 | 2 | -8/+3 |
| * | More fcopysign correctness and performance fix. | Evan Cheng | 2011-02-23 | 1 | -33/+63 |
| * | [AVX] General VUNPCKL codegen support. | David Greene | 2011-02-22 | 2 | -0/+20 |
| * | Use the same (%dx) hack for in[bwl] as for out[bwl]. | Joerg Sonnenberger | 2011-02-22 | 1 | -0/+13 |
| * | VFP single precision arith instructions can go down to NEON pipeline, but on ... | Evan Cheng | 2011-02-22 | 6 | -109/+114 |
| * | Stack alignment is 16 bytes on FreeBSD/i386 too. | Roman Divacky | 2011-02-22 | 2 | -3/+5 |
| * | Guard against de-referencing MBB.end(). | Evan Cheng | 2011-02-22 | 1 | -1/+4 |
| * | available_externally (hidden or not) GVs are always accessed via stubs. rdar:... | Evan Cheng | 2011-02-22 | 1 | -1/+3 |
| * | Only use blx for external function calls on thumb, these could be fixed | Eric Christopher | 2011-02-22 | 1 | -12/+26 |
| * | Recognize loopz and loopnz as aliases for loope and loopne. | Joerg Sonnenberger | 2011-02-22 | 1 | -0/+3 |
| * | Implement xgetbv and xsetbv. | Rafael Espindola | 2011-02-22 | 4 | -0/+19 |
| * | Skipping over debugvalue instructions to determine whether the split spot is ... | Evan Cheng | 2011-02-21 | 1 | -0/+3 |
| * | Revert r124611 - "Keep track of incoming argument's location while emitting L... | Devang Patel | 2011-02-21 | 6 | -25/+25 |
| * | Fixed a bug in the X86 disassembler where a member of the | Sean Callanan | 2011-02-21 | 2 | -5/+5 |
| * | Add XCore intrinsics for various instructions on ports. | Richard Osborne | 2011-02-21 | 1 | -2/+24 |
| * | The stack should be 16 byte aligned on 32 bit solaris. Patch by Yuri. | Duncan Sands | 2011-02-21 | 2 | -3/+4 |
| * | a serious "compare CSE" issue that is nontrivial to get right, | Chris Lattner | 2011-02-21 | 1 | -0/+69 |
| * | Target/X86/X86FastISel: [PR6275] Fix Win32's dllimport function with fastisel. | NAKAMURA Takumi | 2011-02-21 | 1 | -2/+6 |
| * | Generate correct Sparc32 ABI compliant code for functions that return a struct. | Venkatraman Govindaraju | 2011-02-21 | 4 | -8/+84 |
| * | add a missed loop deletion case. | Chris Lattner | 2011-02-21 | 1 | -0/+14 |
| * | add an idiom that loop idiom could theoretically catch. | Chris Lattner | 2011-02-21 | 1 | -0/+10 |
| * | A lo/hi mul has higher latency than an imul r,ri, e.g. 5 cycles compared to 3 | Cameron Zwarich | 2011-02-21 | 1 | -35/+0 |
| * | The signed version of our "magic number" computation for the integer approxim... | Cameron Zwarich | 2011-02-21 | 1 | -6/+4 |
| * | If both operands are loads from stores in memory we can't use movlpd/movlps | Eric Christopher | 2011-02-20 | 1 | -0/+4 |
| * | Use explicit add_subdirectory's for LLVM target sublibraries instead | Oscar Fuentes | 2011-02-20 | 16 | -10/+41 |
| * | Minor x86 README updates. | Eli Friedman | 2011-02-19 | 1 | -20/+14 |
| * | implement PR9264: disambiguating 'bt mem, imm' as a btl. | Chris Lattner | 2011-02-19 | 1 | -0/+3 |
