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path: root/llvm/lib/Target/X86/X86Subtarget.cpp
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* X86JITInfo::getLazyResolverFunction() should not read cpu id to determine ↵Evan Cheng2009-09-031-9/+10
| | | | | | | | whether sse is available. Just use consult subtarget. No functionality changes. llvm-svn: 80880
* Add support for modeling whether or not the processor has support forChris Lattner2009-09-021-6/+8
| | | | | | | conditional moves as a subtarget feature. This is the easy part of PR4841. llvm-svn: 80763
* Short-term workaround for frame-related weirdness on win64.Anton Korobeynikov2009-08-281-1/+1
| | | | | | | | Some other minor win64 fixes as well. Patch by Michael Beck! llvm-svn: 80370
* change the -x86-asm-syntax=intel/att flag to be in X86TAI Chris Lattner2009-08-111-18/+1
| | | | | | | instead of X86 Subtarget. This elimianates dependencies on X86Subtarget from X86TAI. llvm-svn: 78746
* Remove some dead code.Daniel Dunbar2009-08-051-22/+1
| | | | llvm-svn: 78219
* - s/DOUT/DEBUG(errs()/gBill Wendling2009-08-031-4/+5
| | | | | | - Tidy up some headers. llvm-svn: 77929
* Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar2009-08-021-3/+3
| | | | | | | | | | Module*. Also, dropped uses of TargetMachine where unnecessary. The only target which still takes a TargetMachine& is Mips, I would appreciate it if someone would normalize this to match other targets. llvm-svn: 77918
* Fix some minor MSVC compiler warnings.Daniel Dunbar2009-07-191-6/+2
| | | | llvm-svn: 76356
* GV with ghost linkage (module being lazily streamed in in JIT lazy ↵Evan Cheng2009-07-161-5/+9
| | | | | | compilation mode) do not require extra load from stub. This fixes ExecutionEngine/2005-12-02-TailCallBug.ll. llvm-svn: 76121
* fix indentationChris Lattner2009-07-101-14/+14
| | | | llvm-svn: 75277
* remove the now-dead TM argument to these methods.Chris Lattner2009-07-101-2/+2
| | | | llvm-svn: 75276
* make PIC vs DynamicNoPIC be explicit in PICStyles.Chris Lattner2009-07-101-12/+0
| | | | llvm-svn: 75275
* some minor simplifications.Chris Lattner2009-07-101-13/+31
| | | | llvm-svn: 75274
* add a couple of predicates to test for "stub style pic in PIC mode" and ↵Chris Lattner2009-07-101-1/+12
| | | | | | "stub style pic in dynamic-no-pic" mode. llvm-svn: 75273
* simplify fast isel by using ClassifyGlobalReference. ThisChris Lattner2009-07-101-9/+0
| | | | | | elimiantes the last use of GVRequiresExtraLoad, so delete it. llvm-svn: 75244
* eliminate GVRequiresRegister, replacing it with predicates we Chris Lattner2009-07-101-14/+0
| | | | | | need for other purposes. llvm-svn: 75243
* move some classification logic around. Now GVRequiresExtraLoadChris Lattner2009-07-101-25/+78
| | | | | | | is just a trivial wrapper around "ClassifyGlobalReference", which stole a ton of logic from LowerGlobalAddress. llvm-svn: 75237
* GVRequiresExtraLoad is now never used for calls, simplify it based on this.Chris Lattner2009-07-101-8/+3
| | | | llvm-svn: 75232
* actually, just eliminate PCRelGVRequiresExtraLoad. It makes the codeChris Lattner2009-07-101-13/+0
| | | | | | more complex and slow than just directly testing what we care about. llvm-svn: 75231
* There is only one case where GVRequiresExtraLoad returns true for calls:Chris Lattner2009-07-101-2/+15
| | | | | | | split its handling out to PCRelGVRequiresExtraLoad, and simplify code based on this. llvm-svn: 75230
* the "isDirectCall" operand of GVRequiresRegister is always false, eliminate it.Chris Lattner2009-07-101-5/+4
| | | | llvm-svn: 75229
* simplify some code based on the fact that picstyles != none are only valid Chris Lattner2009-07-091-2/+1
| | | | | | in pic or dynamic-no-pic mode. Also, x86-64 never used picstylegot. llvm-svn: 75101
* Reduce indentation in GVRequiresExtraLoad. Return true for windowsChris Lattner2009-07-091-26/+28
| | | | | | with DLLImport symbols even when in -static mode. llvm-svn: 75093
* Add feature flags for AVX and FMA and fix some SSE4A feature flagDavid Greene2009-06-261-0/+9
| | | | | | initialization problems. llvm-svn: 74350
* The attached patches implement most of the ARM AAPCS-VFP hard floatAnton Korobeynikov2009-06-081-0/+4
| | | | | | | | | ABI. The missing piece is support for putting "homogeneous aggregates" into registers. Patch by Sandeep Patel! llvm-svn: 73095
* Update CPU capabilities for AMD machinesStefanus Du Toit2009-05-261-3/+15
| | | | | | | | | | | | | | | | | - added processors k8-sse3, opteron-sse3, athlon64-sse3, amdfam10, and barcelona with appropriate sse3/4a levels - added FeatureSSE4A for amdfam10 processors in X86Subtarget: - added hasSSE4A - updated AutoDetectSubtargetFeatures to detect SSE4A - updated GetCurrentX86CPU to detect family 15 with sse3 as k8-sse3 and family 10h as amdfam10 New processor names match those used by gcc. Patch by Paul Redmond! llvm-svn: 72434
* Try again. Allow call to immediate address for ELF or when in static ↵Evan Cheng2009-05-201-2/+10
| | | | | | relocation mode. llvm-svn: 72160
* add support for detecting process features on win64, patch byChris Lattner2009-04-251-36/+50
| | | | | | Nicolas Capens! llvm-svn: 70057
* Introduce new linkage types linkonce_odr, weak_odr, common_odrDuncan Sands2009-03-071-1/+1
| | | | | | | | | | | | | | | | | | | | | and extern_weak_odr. These are the same as the non-odr versions, except that they indicate that the global will only be overridden by an *equivalent* global. In C, a function with weak linkage can be overridden by a function which behaves completely differently. This means that IP passes have to skip weak functions, since any deductions made from the function definition might be wrong, since the definition could be replaced by something completely different at link time. This is not allowed in C++, thanks to the ODR (One-Definition-Rule): if a function is replaced by another at link-time, then the new function must be the same as the original function. If a language knows that a function or other global can only be overridden by an equivalent global, it can give it the weak_odr linkage type, and the optimizers will understand that it is alright to make deductions based on the function body. The code generators on the other hand map weak and weak_odr linkage to the same thing. llvm-svn: 66339
* Added another darwin subtargetMon P Wang2009-02-281-0/+4
| | | | llvm-svn: 65662
* Tevert part of the x86 subtarget logic changes: when -march=x86-64Dan Gohman2009-02-031-4/+5
| | | | | | | | | | | | | | | is given, override the subtarget settings and enable 64-bit support. This restores the earlier behavior, and fixes regressions on Non-64-bit-capable x86-32 hosts. This isn't necessarily the best approach, but the most obvious alternative is to require -mcpu=x86-64 or -mattr=+64bit to be used with -march=x86-64 when the host doesn't have 64-bit support. This makes things little more consistent, but it's less convenient, and it has the practical drawback of requiring lots of test changes, so I opted for the above approach for now. llvm-svn: 63642
* Change Feature64Bit to not imply FeatureSSE2. All x86-64 hardware hasDan Gohman2009-02-031-10/+9
| | | | | | | | | | | | | | SSE2, however it's possible to disable SSE2, and the subtarget support code thinks that if 64-bit implies SSE2 and SSE2 is disabled then 64-bit should also be disabled. Instead, just mark all the 64-bit subtargets as explicitly supporting SSE2. Also, move the code that makes -march=x86-64 enable 64-bit support by default to only apply when there is no explicit subtarget. If you need to specify a subtarget and you want 64-bit code, you'll need to select a subtarget that supports 64-bit code. llvm-svn: 63575
* Only force SSE level if it is not correct.Torok Edwin2009-02-021-3/+10
| | | | | | Add an assert to check HasX86_64 status. llvm-svn: 63552
* remove #if 0 code on Bill's request.Torok Edwin2009-02-021-4/+0
| | | | llvm-svn: 63542
* Implement -mno-sse: if SSE is disabled on x86-64, don't store XMM on stack forTorok Edwin2009-02-011-1/+1
| | | | | | var-args, and don't allow FP return values llvm-svn: 63495
* should have removed the + when manually applying a patch!Torok Edwin2009-01-251-2/+2
| | | | llvm-svn: 62973
* revert this patch for now, because Codegen does still want to generate SSE code,Torok Edwin2009-01-251-0/+4
| | | | | | for example in the case of va-args. XFAIL associated tests. llvm-svn: 62972
* If user explicitly asks not to use SSE, don't force it. This fixes LLVM part ↵Torok Edwin2009-01-251-2/+0
| | | | | | of PR3402. llvm-svn: 62967
* Add the private linkage.Rafael Espindola2009-01-151-2/+2
| | | | llvm-svn: 62279
* Atom and Core i7 do not have same model number after all.Evan Cheng2009-01-051-4/+3
| | | | llvm-svn: 61686
* Add Intel processors core i7 and atom.Evan Cheng2009-01-031-1/+2
| | | | llvm-svn: 61603
* Fix PR3210: Detect more Intel processors. Patch by Torok Edwin.Evan Cheng2009-01-031-2/+15
| | | | llvm-svn: 61602
* Do not isel load folding bt instructions for pentium m, core, core2, and AMD ↵Evan Cheng2009-01-021-11/+25
| | | | | | processors. These are significantly slower than a load followed by a bt of a register. llvm-svn: 61557
* Fix x86 CPU id detection to identify Penryn (and future processors).Evan Cheng2009-01-021-2/+11
| | | | llvm-svn: 61556
* Add initial support for back-scheduling address computations,Dan Gohman2008-12-161-0/+11
| | | | | | | especially in the case of addresses computed from loop induction variables. llvm-svn: 61075
* Re-apply 60689 now my head is screwed on right.Evan Cheng2008-12-081-0/+2
| | | | llvm-svn: 60711
* Revert 60689. It caused many regressions on Darwin targets.Dan Gohman2008-12-081-3/+1
| | | | llvm-svn: 60705
* Perform cheap checks first.Evan Cheng2008-12-081-1/+3
| | | | llvm-svn: 60689
* Make LoopStrengthReduce smarter about hoisting things out ofDale Johannesen2008-12-051-1/+17
| | | | | | | | | | | loops when they can be subsumed into addressing modes. Change X86 addressing mode check to realize that some PIC references need an extra register. (I believe this is correct for Linux, if not, I'm sure someone will tell me.) llvm-svn: 60608
* Re-did 60519. It turns out Darwin's handling of hidden visibility symbols ↵Evan Cheng2008-12-051-4/+8
| | | | | | are a bit more complicate than I expected. Both declarations and weak definitions still need a stub indirection. However, the stubs are in data section and they contain the addresses of the actual symbols. llvm-svn: 60571
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