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path: root/llvm/lib/Target/X86/X86InstrInfo.h
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* [FastISel][X86] Refactor the code to get the X86 condition from a helper func...Juergen Ributzka2014-06-161-1/+6
* Remove the use of TargetMachine from X86InstrInfo.Eric Christopher2014-06-101-3/+3
* Add a new attribute called 'jumptable' that creates jump-instruction tables f...Tom Roeder2014-06-051-0/+6
* [X86] Tune LEA usage for SilvermontAlexey Volkov2014-05-201-0/+7
* [C++] Use 'nullptr'.Craig Topper2014-04-281-1/+1
* [X86] As per suggestion from Craig Topper and Hal Finkel, overrideLang Hames2014-04-021-0/+3
* [C++11] Mark more classes in the X86 target as 'final'.Craig Topper2014-03-311-1/+1
* Prune includes in X86 target.Craig Topper2014-03-191-1/+1
* X86: Use enums for memory operand decoding instead of integer literals.Manuel Jacob2014-03-181-9/+10
* De-virtualize some methods since they don't override anything.Craig Topper2014-03-091-13/+13
* [C++11] Add 'override' keyword to virtual methods that override their base cl...Craig Topper2014-03-091-93/+97
* Switch all uses of LLVM_OVERRIDE to just use 'override' directly.Craig Topper2014-03-021-1/+1
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-191-0/+2
* Revert r194865 and r194874.Alexey Samsonov2013-11-181-2/+0
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-151-0/+2
* Fix the ExecutionDepsFix pass to handle AVX instructions.Andrew Trick2013-10-141-0/+2
* Add MI-Sched support for x86 macro fusion.Andrew Trick2013-06-231-0/+3
* DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineI...David Blaikie2013-06-161-6/+0
* X86: Stop LEA64_32r doing unspeakable things to its arguments.Tim Northover2013-06-101-0/+13
* Re-work X86 code generation of atomic ops with spin-loopMichael Liao2012-09-201-0/+3
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-021-1/+5
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-021-0/+8
* Revert r160920 and r160919 due to dragonegg and clang selfhost failureManman Ren2012-07-291-8/+0
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-07-281-0/+8
* X86: peephole optimization to remove cmp instructionManman Ren2012-07-061-0/+15
* Add early if-conversion support to X86.Jakob Stoklund Olesen2012-07-041-0/+8
* Make helper method static since it doesn't use anything in the class.Craig Topper2012-06-231-3/+3
* Revert r157755.Manman Ren2012-06-061-3/+0
* Revert r157831Manman Ren2012-06-031-6/+0
* X86: peephole optimization to remove cmp instructionManman Ren2012-06-011-0/+6
* Remove a trailing space and fix a comment.Craig Topper2012-06-011-3/+2
* X86: replace SUB with CMP if possibleManman Ren2012-05-311-0/+3
* Added FMA3 Intel instructions.Elena Demikhovsky2012-05-311-1/+3
* Reorder includes in Target backends to following coding standards. Remove som...Craig Topper2012-03-171-1/+1
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* Break false dependencies before partial register updates.Jakob Stoklund Olesen2011-11-151-0/+5
* Expand the x86 V_SET0* pseudos right after register allocation.Jakob Stoklund Olesen2011-09-291-0/+3
* Promote the X86 Get/SetSSEDomain functions to TargetInstrInfo.Jakob Stoklund Olesen2011-09-271-5/+3
* * Combines Alignment, AuxInfo, and TB_NOT_REVERSABLE flag into aBruno Cardoso Lopes2011-09-081-5/+13
* Hoist hasLoadFromStackSlot and hasStoreToStackSlot.Jakob Stoklund Olesen2011-08-081-21/+0
* Refactor X86 target to separate MC code from Target code.Evan Cheng2011-07-251-501/+2
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-011-1/+4
* Remove unused OpcodeMask enumerator.Francois Pichet2011-05-251-1/+0
* Fix MSVC warning: "is out of range for enum constant" Francois Pichet2011-05-251-1/+1
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-1/+1
* Make OpcodeMask an unsigned long long literal to deal with overflow.Joerg Sonnenberger2011-04-041-1/+1
* Add support for the VIA PadLock instructions.Joerg Sonnenberger2011-04-041-2/+3
* Expand Op0Mask by one bit in preparation for the PadLock prefixes.Joerg Sonnenberger2011-04-041-11/+12
* Increased the register pressure limit on x86_64 from 8 to 12Andrew Trick2011-03-051-0/+2
* whitespaceAndrew Trick2011-03-051-51/+51
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