| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Fix a long-standing wart in the code generator: two-address instruction lowering | Chris Lattner | 2006-09-05 | 1 | -1/+1 |
| * | Can't commute shufps. The high / low parts elements come from different vectors. | Evan Cheng | 2006-07-25 | 1 | -18/+0 |
| * | Commute shufps / shufpd. | Evan Cheng | 2006-05-30 | 1 | -0/+18 |
| * | Somehow I lost a condition when I was shuffling some code around. Anyway, | Evan Cheng | 2006-05-30 | 1 | -1/+1 |
| * | Fix a build breaker. | Evan Cheng | 2006-05-30 | 1 | -10/+12 |
| * | Oops. PSHUFD is only available with SSE2. | Evan Cheng | 2006-05-30 | 1 | -5/+8 |
| * | Allow shufps x, x, mask to be converted to pshufd x, mask to save a move. | Evan Cheng | 2006-05-30 | 1 | -1/+12 |
| * | These can be transformed into lea as well. Not that we use this feature | Evan Cheng | 2006-05-19 | 1 | -0/+2 |
| * | Add MOV16_rm / MOV32_rm and MOV16_mr / MOV32_mr to isLoadFromStackSlot and is... | Evan Cheng | 2006-05-11 | 1 | -0/+4 |
| * | Fixing truncate. Previously we were emitting truncate from r16 to r8 as | Evan Cheng | 2006-05-08 | 1 | -0/+1 |
| * | Teach the codegen about instructions used for SSE spill code, allowing it | Chris Lattner | 2006-04-18 | 1 | -0/+4 |
| * | - More efficient extract_vector_elt with shuffle and movss, movsd, movd, etc. | Evan Cheng | 2006-04-03 | 1 | -2/+4 |
| * | Support for scalar to vector with zero extension. | Evan Cheng | 2006-03-24 | 1 | -1/+2 |
| * | - Remove scalar to vector pseudo ops. They are just wrong. | Evan Cheng | 2006-03-21 | 1 | -1/+2 |
| * | 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This | Evan Cheng | 2006-02-16 | 1 | -0/+1 |
| * | fix operand numbers | Chris Lattner | 2006-02-02 | 1 | -4/+4 |
| * | Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far ... | Chris Lattner | 2006-02-02 | 1 | -0/+48 |
| * | Tell codegen MOVAPSrr and MOVAPDrr are copies. | Evan Cheng | 2006-02-01 | 1 | -1/+2 |
| * | Properly split f32 and f64 into separate register classes for scalar sse fp | Nate Begeman | 2005-10-14 | 1 | -1/+1 |
| * | Teach the register allocator that movaps is also a move instruction | Nate Begeman | 2005-07-16 | 1 | -1/+1 |
| * | First round of support for doing scalar FP using the SSE2 ISA extension and | Nate Begeman | 2005-07-06 | 1 | -1/+1 |
| * | * Remove trailing whitespace | Misha Brukman | 2005-04-21 | 1 | -4/+4 |
| * | When commuting these instructions, make sure to actually swap the operands too. | Chris Lattner | 2005-01-19 | 1 | -1/+1 |
| * | Improve coverage of the X86 instruction set by adding 16-bit shift doubles. | Chris Lattner | 2005-01-19 | 1 | -3/+12 |
| * | Teach the code generator that shrd/shld is commutable if it has an immediate. | Chris Lattner | 2005-01-19 | 1 | -0/+20 |
| * | Disable 2->3 address promotion of add and inc instructions to LEA's. In | Chris Lattner | 2005-01-02 | 1 | -0/+5 |
| * | Implement the convertToThreeAddress method, add support for inverting JP/JNP | Chris Lattner | 2005-01-02 | 1 | -0/+81 |
| * | Fix a warning | Chris Lattner | 2004-08-01 | 1 | -2/+1 |
| * | Align breaks. | Alkis Evlogimenos | 2004-07-31 | 1 | -6/+6 |
| * | Add breaks | Chris Lattner | 2004-07-31 | 1 | -12/+12 |
| * | Simplify code a bit. | Alkis Evlogimenos | 2004-07-31 | 1 | -3/+1 |
| * | Correctly spell 'unconditional'. | Alkis Evlogimenos | 2004-07-31 | 1 | -1/+1 |
| * | Implement insertGoto and reverseBranchCondition for the X86. | Alkis Evlogimenos | 2004-07-31 | 1 | -0/+33 |
| * | A big X86 instruction rename. The instructions are renamed to make | Alkis Evlogimenos | 2004-02-29 | 1 | -1/+1 |
| * | Adjust to change in TII ctor arguments | Chris Lattner | 2004-02-29 | 1 | -3/+1 |
| * | These two virtual methods are never called. | Chris Lattner | 2004-02-29 | 1 | -27/+0 |
| * | Move MOTy::UseType enum into MachineOperand. This eliminates the | Alkis Evlogimenos | 2004-02-22 | 1 | -2/+2 |
| * | Remove getAllocatedRegNum(). Use getReg() instead. | Alkis Evlogimenos | 2004-02-13 | 1 | -2/+2 |
| * | Don't use MachineOperator::is(Phys|Virt)Register | Chris Lattner | 2004-02-10 | 1 | -2/+2 |
| * | Tighten up checks | Chris Lattner | 2004-02-10 | 1 | -2/+2 |
| * | FpMOV is also a move instruction. | Alkis Evlogimenos | 2004-02-01 | 1 | -1/+2 |
| * | Add TargetInstrInfo::isMoveInstr() to support coalescing in register | Alkis Evlogimenos | 2003-12-28 | 1 | -0/+15 |
| * | Put all LLVM code into the llvm namespace, as per bug 109. | Brian Gaeke | 2003-11-11 | 1 | -0/+2 |
| * | Added LLVM project notice to the top of every C++ source file. | John Criswell | 2003-10-20 | 1 | -0/+7 |
| * | * Start using tablegen'd instruction descriptions | Chris Lattner | 2003-08-03 | 1 | -43/+6 |
| * | Reword to remove reference to how things worked in the past. | Misha Brukman | 2003-05-24 | 1 | -4/+3 |
| * | Implement the TargetInstrInfo's createNOPinstr() and isNOPinstr() interface. | Misha Brukman | 2003-05-24 | 1 | -1/+29 |
| * | Rename MachineInstrInfo -> TargetInstrInfo | Chris Lattner | 2003-01-14 | 1 | -3/+3 |
| * | Add comments, switch uses/defs to match InstrInfo.def file | Chris Lattner | 2002-12-18 | 1 | -2/+10 |
| * | * Move information about Implicit Defs/Uses into X86InstrInfo.def. | Chris Lattner | 2002-12-03 | 1 | -4/+10 |
