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path: root/llvm/lib/Target/X86/X86InstrCompiler.td
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* Avoid a Symbol -> Name -> Symbol conversion.Rafael Espindola2015-06-221-2/+14
* AVX-512: fixed algorithm of building vectors of i1 elementsElena Demikhovsky2015-05-201-4/+5
* AVX-512: select operation for i1 vectorsElena Demikhovsky2015-05-121-0/+4
* Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes"Sergey Dmitrouk2015-04-281-2/+2
* Revert "[DebugInfo] Add debug locations to constant SD nodes"Daniel Jasper2015-04-281-2/+2
* [DebugInfo] Add debug locations to constant SD nodesSergey Dmitrouk2015-04-281-2/+2
* [X86] Apply AddedComplexity consistently for similar patterns. This keeps the...Craig Topper2015-04-041-4/+8
* [X86] Add a comment about the change in r234075.Craig Topper2015-04-041-0/+2
* [X86] Don't use GR64 register 'and with immediate' instructions if the immedi...Craig Topper2015-04-041-0/+5
* [X86] Factor out the CMOV pseudo definitions. NFCI.Ahmed Bougacha2015-02-141-125/+43
* MathExtras: Bring Count(Trailing|Leading)Ones and CountPopulation in line wit...Benjamin Kramer2015-02-121-2/+6
* [X86] Convert esp-relative movs of function arguments to pushes, step 2Michael Kuperstein2015-02-011-5/+9
* Revert r227728 due to bad line endings.Michael Kuperstein2015-02-011-1852/+1848
* [X86] Convert esp-relative movs of function arguments to pushes, step 2Michael Kuperstein2015-02-011-1848/+1852
* [x32] Change the condition from bitness to LP64 for TCRETURNdi64. Michael Kuperstein2015-01-281-2/+2
* [x32] Enable sibcall optimization on x32. Michael Kuperstein2015-01-281-5/+5
* Add the llvm.frameallocate and llvm.recoverframeallocation intrinsicsReid Kleckner2015-01-131-0/+3
* [X86] Make isel select the 2-byte register form of INC/DEC even in non-64-bit...Craig Topper2015-01-061-29/+12
* [X86] Use 32-bit sign extended immediate for 64-bit LOCK_ArithBinOp with sign...Craig Topper2015-01-031-6/+6
* Replace neverHasSideEffects=1 with hasSideEffects=0 in all .td files.Craig Topper2014-11-261-2/+2
* [X86] Fix pattern match for 32-to-64-bit zext in the presence of AssertSextMichael Kuperstein2014-11-111-0/+1
* Reverting r221626 due to a too-strict test.Michael Kuperstein2014-11-101-1/+0
* [X86] Fix pattern match for 32-to-64-bit zext in the presence of AssertSextMichael Kuperstein2014-11-101-0/+1
* [X86] Avoid generating inc/dec when slow for x.atomic_store(1 + x.atomic_load())Robin Morisset2014-10-081-2/+2
* [x32] Fix segmented stacks supportPavel Chupin2014-09-221-5/+5
* [X86] Allow atomic operations using immediates to avoid using a registerRobin Morisset2014-09-021-13/+94
* Fix failure to invoke exception handler on Win64Reid Kleckner2014-08-041-0/+2
* [X86] Simplify X87 stackifier pass.Akira Hatanaka2014-08-011-2/+4
* Revert r213070. It's breaking the build in MCELFStreamer::EmitInstToData(...).Cameron McInally2014-07-151-6/+0
* Add x86 patterns to match a specific add-with-carry. Cameron McInally2014-07-151-0/+6
* X86: expand atomics in IR instead of as MachineInstrs.Tim Northover2014-07-011-77/+0
* Re-apply r211399, "Generate native unwind info on Win64" with a fix to ignore...NAKAMURA Takumi2014-06-251-0/+20
* Reformat.NAKAMURA Takumi2014-06-251-2/+2
* Revert r211399, "Generate native unwind info on Win64"NAKAMURA Takumi2014-06-221-22/+2
* Generate native unwind info on Win64Reid Kleckner2014-06-201-2/+22
* [X86] Use ADD/SUB instead of INC/DEC for SilvermontAlexey Volkov2014-06-091-12/+26
* Rename ComputeMaskedBits to computeKnownBits. "Masked" has beenJay Foad2014-05-141-2/+2
* [X86] Add peephole for masked rotate amountAdam Nemet2014-03-121-0/+2
* [X86] Refactor peepholes for masked shift amount into a multiclassAdam Nemet2014-03-121-55/+25
* X86: Enable ISel of 16-bit MOVBE instructions.Jim Grosbach2014-03-111-0/+6
* Merge x86 HasOpSizePrefix/HasOpSize16Prefix into a 2-bit OpSize field with 0 ...Craig Topper2014-02-021-20/+20
* [x86] Remove OpSize16 flag from MOV32r0David Woodhouse2014-01-081-2/+1
* [x86] Add OpSize16 to instructions that need itDavid Woodhouse2014-01-081-9/+10
* Remove opcode from MOV32r0 that I accidentally left when I converted it to Ps...Craig Topper2014-01-051-2/+1
* Handle MOV32r0 in expandPostRAPseudo instead of MCInst lowering. No functiona...Craig Topper2013-12-311-2/+2
* [x86] Rename In32BitMode predicate to Not64BitModeEric Christopher2013-12-201-38/+38
* Revert "Revert "Mark vastart_save_xmm_regs as changing EFLAGS""Duncan P. N. Exon Smith2013-12-171-2/+3
* Revert "Mark vastart_save_xmm_regs as changing EFLAGS"Duncan P. N. Exon Smith2013-12-171-1/+1
* Mark vastart_save_xmm_regs as changing EFLAGSDuncan P. N. Exon Smith2013-12-171-1/+1
* AVX-512: Implemented CMOV for 512-bit vectorsElena Demikhovsky2013-10-311-0/+18
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