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path: root/llvm/lib/Target/X86/X86ISelLowering.cpp
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* [X86] Add custom promotion of narrow fp_to_uint/fp_to_sint operations under -...Craig Topper2018-11-161-3/+48
* [X86] Qualify part of the masked gather handling in ReplaceNodeResults with a...Craig Topper2018-11-161-21/+23
* [X86] Remove a branch on SSE4.1 from LowerLoadCraig Topper2018-11-161-14/+2
* [X86] In LowerLoad, fix assert messages and rename a variable that use Zize i...Craig Topper2018-11-161-8/+8
* [X86][SSE] Move number of input limit out of resolveTargetShuffleInputs. Simon Pilgrim2018-11-161-3/+5
* [X86] Add custom type legalization for v2i8/v4i8/v8i8 mul under -x86-experime...Craig Topper2018-11-161-2/+20
* [X86] Use ANY_EXTEND instead of SIGN_EXTEND in the AVX2 and later path for le...Craig Topper2018-11-161-2/+2
* [X86] Update a couple comments to remove a mention of a sign extending that n...Craig Topper2018-11-161-3/+3
* [X86] Remove ANY_EXTEND special case from canReduceVMulWidthCraig Topper2018-11-151-18/+2
* [X86] Minor cleanup to getExtendInVec. NFCICraig Topper2018-11-151-4/+7
* [X86] Add -x86-experimental-vector-widening support to reduceVMULWidth and co...Craig Topper2018-11-151-14/+22
* [X86] Add some custom type legalization rules for truncate with -x86-experime...Craig Topper2018-11-151-0/+64
* [X86] Don't mark SEXTLOADS with narrow types as Custom with -x86-experimental...Craig Topper2018-11-151-8/+27
* [X86] Remove unused variableBenjamin Kramer2018-11-141-1/+0
* [X86] Support v2i32/v4i16/v8i8 load/store using f64 on 32-bit targets under -...Craig Topper2018-11-141-15/+38
* [X86] Allow pmulh to be formed from narrow vXi16 vectors under -x86-experimen...Craig Topper2018-11-141-2/+4
* [X86][AVX512] Remove constant pool shuffle decoding from SelectionDAGSimon Pilgrim2018-11-141-3/+3
* [SelectionDAG][X86] Relax restriction on the width of an input to *_EXTEND_VE...Craig Topper2018-11-131-75/+50
* [X86][SSE] Add lowerVectorShuffleAsByteRotateAndPermute (PR39387)Simon Pilgrim2018-11-121-8/+115
* [X86] In LowerMULH, use generic truncate and vector shuffle nodes instead of ...Craig Topper2018-11-121-13/+18
* [X86] Use DAG.getConstant instead of getZeroVector.Craig Topper2018-11-111-1/+1
* [X86] Replace calls to getOnesVector/getZeroVector with getConstant.Craig Topper2018-11-111-2/+2
* [X86] Remove unused variableBenjamin Kramer2018-11-101-1/+0
* [X86] Remove apparently unneeded code from combineVSZext.Craig Topper2018-11-101-50/+0
* [X86] In LowerHorizontalByteSum, emit vector_shuffle nodes instead of directl...Craig Topper2018-11-101-5/+5
* [X86] Move the promotion of v16i16->v16i8 for avx512f but not avx512bw from l...Craig Topper2018-11-091-8/+6
* [X86] Turn X86ISD::VSEXT into X86ISD::VZEXT if the upper bits aren't demanded.Craig Topper2018-11-091-0/+12
* [x86] try to form broadcast before widening shuffle elementsSanjay Patel2018-11-091-0/+8
* [X86] Add Subtarget to more lowerVectorShuffle functions. NFCI.Simon Pilgrim2018-11-091-22/+26
* [x86] use shuffles for scalar insertion into high elements of a constant vectorSanjay Patel2018-11-081-4/+18
* [X86] Add custom promotion of v2i8/v2i16 fp_to_sint to avoid over promotion t...Craig Topper2018-11-061-1/+24
* [TargetLowering] Change TargetLoweringBase::getPreferredVectorAction to take ...Craig Topper2018-11-051-2/+2
* [X86] Don't turn any_extend from a mask register into a sign_extend during lo...Craig Topper2018-11-051-2/+2
* [X86] Custom type legalize v2i8/v2i16/v2i32 mul to use to pmuludq.Craig Topper2018-11-051-0/+42
* [X86] Add vector shift by immediate to SimplifyDemandedBitsForTargetNode.Craig Topper2018-11-041-0/+42
* [SelectionDAG] Remove special methods for creating *_EXTEND_VECTOR_INREG node...Craig Topper2018-11-041-14/+19
* [X86] Update comment I forgot to change in r346043. NFCCraig Topper2018-11-031-2/+2
* [X86] In LowerEXTEND_VECTOR_INREG, emit a vector shuffle instead of directly ...Craig Topper2018-11-021-1/+1
* [X86] Don't emit *_extend_vector_inreg nodes when both the input and output t...Craig Topper2018-11-021-27/+18
* [LegalizeDAG] Add generic vector CTPOP expansion (PR32655)Simon Pilgrim2018-11-011-53/+2
* [X86][SSE] Move 2-input limit up from getFauxShuffleMask to resolveTargetShuf...Simon Pilgrim2018-11-011-6/+3
* [X86] In lowerVectorShuffleAsBroadcast, make peeking through CONCAT_VECTORS w...Craig Topper2018-10-301-1/+2
* [LegalizeTypes] Teach PromoteIntRes_BITCAST to better handle a bitcast with v...Craig Topper2018-10-301-8/+2
* [X86] Cleanup the code in LowerFABSorFNEG and LowerFCOPYSIGN a little. NFCCraig Topper2018-10-301-30/+20
* [X86] Stop changing f128 fand/for/fxor to v2i64.Craig Topper2018-10-301-19/+19
* [X86][SSE] getFauxShuffleMask - Fix shuffle mask adjustment for multiple inse...Simon Pilgrim2018-10-291-4/+3
* [X86] Recognize constant splats in LowerFCOPYSIGN.Craig Topper2018-10-281-1/+1
* [VectorLegalizer] Enable TargetLowering::expandFP_TO_UINT support.Simon Pilgrim2018-10-281-8/+20
* [X86][SSE] LowerVSELECT - pull out repeated getOperand(). NFCI.Simon Pilgrim2018-10-271-11/+13
* Revert rL345395: [X86][SSE] Move 2-input limit up from getFauxShuffleMask to ...Simon Pilgrim2018-10-271-2/+6
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