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path: root/llvm/lib/Target/X86/X86ISelLowering.cpp
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* Spelling fixes. NFC.Simon Pilgrim2015-01-281-4/+4
* invert check for less indentation; use local vars to reduce duplication; NFCSanjay Patel2015-01-281-19/+20
* use SDValue methods directly instead of getNode()->* ; NFCISanjay Patel2015-01-281-10/+10
* [X86] Reduce some 32-bit imuls into lea + shlMichael Kuperstein2015-01-281-3/+2
* [x32] Enable sibcall optimization on x32. Michael Kuperstein2015-01-281-1/+2
* AVX-512: Added FMA intrinsics with rounding modeElena Demikhovsky2015-01-281-112/+36
* Revert "[x86] Combine x86mmx/i64 to v2i64 conversion to use scalar_to_vector"Alexey Samsonov2015-01-271-29/+0
* AVX-512: Changes in operations on masks registers for KNL and SKXElena Demikhovsky2015-01-251-0/+4
* [x86] Fix a commentBruno Cardoso Lopes2015-01-241-1/+1
* [x86] Combine x86mmx/i64 to v2i64 conversion to use scalar_to_vectorBruno Cardoso Lopes2015-01-231-0/+29
* Remove some local variables in place of just querying for themEric Christopher2015-01-231-6/+4
* Mark |TLI| variables used to suppress -Wunused-variable warnings.Alexander Potapenko2015-01-221-0/+2
* Fixed a bug in type legalizer for masked load/store intrinsics.Elena Demikhovsky2015-01-221-0/+164
* [X86][SSE] Added support for SSE3 lane duplication shuffle instructionsSimon Pilgrim2015-01-211-1/+31
* [X86] Declare SSE4.1/AVX2 vector extloads covered by PMOV[SZ]X legal.Ahmed Bougacha2015-01-211-0/+30
* [X86][DAG] Disable target specific combine on INSERTPS dag nodes at -O0.Andrea Di Biagio2015-01-161-2/+5
* [AVX512] Unpack support in new shuffle loweringAdam Nemet2015-01-131-0/+34
* [X86][SSE] Minor regression fix for r225551Simon Pilgrim2015-01-121-1/+2
* [X86] Also create+widen FMIN/FMAX nodes for v2f32.Ahmed Bougacha2015-01-121-1/+18
* Revert most of r225597David Majnemer2015-01-111-20/+12
* X86: Properly decode shuffle masks when the constant pool type is weirdDavid Majnemer2015-01-111-18/+20
* X86: teach X86TargetLowering about L,M,O constraintsSaleem Abdulrasool2015-01-111-0/+25
* [X86][SSE] Improved (v)insertps shuffle matchingSimon Pilgrim2015-01-101-42/+82
* [X86][SSE] Avoid vector byte shuffles with zero by using pshufb to create zerosSimon Pilgrim2015-01-091-12/+30
* [x86] Add a flag to control the vector shuffle legality predicates thatChandler Carruth2015-01-091-0/+23
* [X86] Reflow comment. NFC.Ahmed Bougacha2015-01-081-3/+4
* [X86] Don't try to generate direct calls to TLS globalsMichael Kuperstein2015-01-081-1/+2
* [SelectionDAG] Allow targets to specify legality of extloads' resultAhmed Bougacha2015-01-081-26/+39
* [CodeGen] Use MVT iterator_ranges in legality loops. NFC intended.Ahmed Bougacha2015-01-071-26/+9
* [X86] Fix 512->256 typo in comments. NFC.Ahmed Bougacha2015-01-071-2/+2
* [X86] Teach FCOPYSIGN lowering to recognize constant magnitudes.Ahmed Bougacha2015-01-071-6/+19
* X86: Don't make illegal GOTTPOFF relocationsDavid Majnemer2015-01-061-0/+12
* [X86] Make isel select the shorter form of jump instructions instead of the l...Craig Topper2015-01-061-6/+6
* [X86][SSE] lowerVectorShuffleAsByteShift tidyupSimon Pilgrim2015-01-051-21/+14
* [X86][SSE] Fixed description for isSequentialOrUndefInRange. NFC.Simon Pilgrim2015-01-051-1/+1
* Improved comments. No functional change intended.Andrea Di Biagio2015-01-021-2/+2
* [CodeGenPrepare] Teach when it is profitable to speculate calls to @llvm.cttz...Andrea Di Biagio2014-12-281-0/+10
* Fixing another -Wunused-variable warning, this time in release builds without...Aaron Ballman2014-12-271-3/+3
* Removing a variable that is set but never used, to silence a -Wunused-but-set...Aaron Ballman2014-12-271-4/+0
* AVX-512: Added FMA instructions, intrinsics an tests for KNL and SKX targetsElena Demikhovsky2014-12-231-0/+10
* AVX-512: BLENDM - fixed encoding of the broadcast versionElena Demikhovsky2014-12-231-0/+1
* X86: Don't over-align combined loads.Jim Grosbach2014-12-231-8/+3
* Make musttail more robust for vector types on x86Reid Kleckner2014-12-221-87/+104
* [x86] Add vector @llvm.ctpop intrinsic custom loweringBruno Cardoso Lopes2014-12-221-0/+152
* AVX-512: Added all forms of BLENDM instructions,Elena Demikhovsky2014-12-221-0/+14
* Masked load and store codegen - fixed 128-bit vectorsElena Demikhovsky2014-12-191-12/+4
* [AVX512] Enable FP arithmetic lowering for AVX512VL subsets.Robert Khasanov2014-12-181-1/+2
* [DAGCombine] Slightly improve lowering of BUILD_VECTOR into a shuffle.Michael Kuperstein2014-12-171-0/+8
* [CodeGenPrepare] Reapply r224351 with a fix for the assertion failure:Quentin Colombet2014-12-171-1/+1
* Revert "[CodeGenPrepare] Move sign/zero extensions near loads using type prom...Reid Kleckner2014-12-171-1/+1
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