| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Teach the code generator to use cvtss2sd as extload f32 -> f64 | Chris Lattner | 2006-05-05 | 1 | -4/+0 |
| * | Refactor TargetMachine, pushing handling of TargetData into the target-specif... | Owen Anderson | 2006-05-03 | 1 | -2/+2 |
| * | Initial caller side support (for CCC only, not FastCC) of 128-bit vector | Evan Cheng | 2006-04-28 | 1 | -7/+73 |
| * | Implement four-wide shuffle with 2 shufps if no more than two elements come | Evan Cheng | 2006-04-28 | 1 | -2/+47 |
| * | TargetLowering::LowerArguments should return a VBIT_CONVERT of | Evan Cheng | 2006-04-28 | 1 | -1/+1 |
| * | Make x86 isel lowering produce tailcall nodes. They are match to normal calls | Evan Cheng | 2006-04-27 | 1 | -1/+1 |
| * | Support for passing 128-bit vector arguments via XMM registers. | Evan Cheng | 2006-04-27 | 1 | -27/+97 |
| * | Oops | Evan Cheng | 2006-04-27 | 1 | -1/+1 |
| * | Bug fix: not updating NumIntRegs. | Evan Cheng | 2006-04-27 | 1 | -60/+65 |
| * | - Clean up formal argument lowering code. Prepare for vector pass by value work. | Evan Cheng | 2006-04-27 | 1 | -213/+214 |
| * | Fix fastcc failures. | Evan Cheng | 2006-04-26 | 1 | -0/+3 |
| * | Switching over FORMAL_ARGUMENTS mechanism to lower call arguments. | Evan Cheng | 2006-04-26 | 1 | -78/+167 |
| * | Separate LowerOperation() into multiple functions, one per opcode. | Evan Cheng | 2006-04-25 | 1 | -1129/+1183 |
| * | Special case handling two wide build_vector(0, x). | Evan Cheng | 2006-04-24 | 1 | -4/+4 |
| * | A little bit more build_vector enhancement for v8i16 cases. | Evan Cheng | 2006-04-24 | 1 | -42/+105 |
| * | MOVL shuffle (i.e. movd or movss / movsd from memory) of undef, V2 == V2 | Evan Cheng | 2006-04-23 | 1 | -2/+7 |
| * | JumpTable support! What this represents is working asm and jit support for | Nate Begeman | 2006-04-22 | 1 | -2/+17 |
| * | Don't do all the lowering stuff for 2-wide build_vector's. Also, minor optimi... | Evan Cheng | 2006-04-22 | 1 | -2/+5 |
| * | Fix a performance regression. Use {p}shuf* when there are only two distinct e... | Evan Cheng | 2006-04-22 | 1 | -13/+17 |
| * | Revamp build_vector lowering to take advantage of movss and movd instructions. | Evan Cheng | 2006-04-21 | 1 | -64/+141 |
| * | Now generating perfect (I think) code for "vector set" with a single non-zero | Evan Cheng | 2006-04-21 | 1 | -69/+127 |
| * | - Added support to turn "vector clear elements", e.g. pand V, <-1, -1, 0, -1> | Evan Cheng | 2006-04-20 | 1 | -75/+222 |
| * | Handle v2i64 BUILD_VECTOR custom lowering correctly. v2i64 is a legal type, | Evan Cheng | 2006-04-20 | 1 | -1/+16 |
| * | isSplatMask() bug: first element can be an undef. | Evan Cheng | 2006-04-19 | 1 | -6/+18 |
| * | - Added support to do aribitrary 4 wide shuffle with no more than three | Evan Cheng | 2006-04-19 | 1 | -7/+54 |
| * | Commute vector_shuffle to match more movlhps, movlp{s|d} cases. | Evan Cheng | 2006-04-19 | 1 | -58/+57 |
| * | Use movss to insert_vector_elt(v, s, 0). | Evan Cheng | 2006-04-17 | 1 | -19/+32 |
| * | Use two pinsrw to insert an element into v4i32 / v4f32 vector. | Evan Cheng | 2006-04-17 | 1 | -3/+30 |
| * | Implement v8i16, v16i8 splat using unpckl + pshufd. | Evan Cheng | 2006-04-17 | 1 | -16/+56 |
| * | implement returns of a vector, testcase here: CodeGen/X86/vec_return.ll | Chris Lattner | 2006-04-17 | 1 | -23/+27 |
| * | FP SETOLT, SETOLT, SETUGE, SETUGT conditions were implemented incorrectly | Evan Cheng | 2006-04-17 | 1 | -4/+4 |
| * | Silly bug | Evan Cheng | 2006-04-15 | 1 | -12/+10 |
| * | Do not use movs{h|l}dup for a shuffle with a single non-undef node. | Evan Cheng | 2006-04-15 | 1 | -2/+14 |
| * | Last few SSE3 intrinsics. | Evan Cheng | 2006-04-14 | 1 | -2/+57 |
| * | X86 SSE2 supports v8i16 multiplication | Evan Cheng | 2006-04-13 | 1 | -0/+1 |
| * | All "integer" logical ops (pand, por, pxor) are now promoted to v2i64. | Evan Cheng | 2006-04-12 | 1 | -18/+29 |
| * | Promote v4i32, v8i16, v16i8 load to v2i64 load. | Evan Cheng | 2006-04-12 | 1 | -4/+3 |
| * | Added support for _mm_move_ss and _mm_move_sd. | Evan Cheng | 2006-04-11 | 1 | -2/+27 |
| * | Conditional move of vector types. | Evan Cheng | 2006-04-10 | 1 | -37/+48 |
| * | Code clean up. | Evan Cheng | 2006-04-07 | 1 | -141/+51 |
| * | - movlp{s|d} and movhp{s|d} support. | Evan Cheng | 2006-04-06 | 1 | -62/+172 |
| * | Support for comi / ucomi intrinsics. | Evan Cheng | 2006-04-05 | 1 | -7/+126 |
| * | Handle canonical form of e.g. | Evan Cheng | 2006-04-05 | 1 | -0/+33 |
| * | Bogus assert | Evan Cheng | 2006-04-05 | 1 | -5/+8 |
| * | Fallthrough to expand if a VECTOR_SHUFFLE cannot be custom lowered. | Evan Cheng | 2006-04-05 | 1 | -15/+14 |
| * | Handle v8i16 shuffle that must be broken into a pair of pshufhw / pshuflw. | Evan Cheng | 2006-04-05 | 1 | -2/+55 |
| * | Use movlpd to: store lower f64 extracted from v2f64. | Evan Cheng | 2006-04-03 | 1 | -0/+2 |
| * | - More efficient extract_vector_elt with shuffle and movss, movsd, movd, etc. | Evan Cheng | 2006-04-03 | 1 | -5/+57 |
| * | Use a X86 target specific node X86ISD::PINSRW instead of a mal-formed | Evan Cheng | 2006-03-31 | 1 | -1/+2 |
| * | Add support to use pextrw and pinsrw to extract and insert a word element | Evan Cheng | 2006-03-31 | 1 | -2/+36 |
