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path: root/llvm/lib/Target/X86/X86ISelLowering.cpp
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* Fix PR20087 by using the source index when changing the vector loadFilipe Cabecinhas2014-06-221-2/+2
* Generate native unwind info on Win64Reid Kleckner2014-06-201-3/+2
* [x86] Make the x86 PACKSSWB, PACKSSDW, PACKUSWB, and PACKUSDWChandler Carruth2014-06-201-0/+16
* [X86] Teach how to combine horizontal binop even in the presence of undefs.Andrea Di Biagio2014-06-191-40/+115
* Hook up vector int_ctlz for AVX512.Cameron McInally2014-06-161-0/+5
* X86: lower ATOMIC_CMP_SWAP_WITH_SUCCESS directlyTim Northover2014-06-131-12/+31
* IR: add "cmpxchg weak" variant to support permitted failure.Tim Northover2014-06-131-7/+8
* [X86] Teach how to dump the name of target node RDTSCP_DAG.Andrea Di Biagio2014-06-121-0/+1
* [X86] Teach how to combine AVX and AVX2 horizontal binop on packed 256-bit ve...Andrea Di Biagio2014-06-121-9/+103
* X86: add stringy name for X86ISD::LCMPXCHG16_DAGTim Northover2014-06-111-0/+1
* [X86] Refactor the logic to select horizontal adds/subs to a helper function.Andrea Di Biagio2014-06-111-90/+118
* Use the TargetMachine on the DAG or the MachineFunction insteadEric Christopher2014-06-101-82/+80
* Add a FIXME.Eric Christopher2014-06-101-0/+2
* [X86] Improved target combine rules for selecting horizontal add/sub.Andrea Di Biagio2014-06-101-2/+20
* SelectionDAG: Don't use MVT::Other to determine legality of ISD::SELECT_CCTom Stellard2014-06-101-1/+8
* Revert "X86: elide comparisons after cmpxchg instructions."Tim Northover2014-06-101-102/+54
* X86: elide comparisons after cmpxchg instructions.Tim Northover2014-06-101-54/+102
* Move all of the x86 subtarget initialized variables down into the x86 subtargetEric Christopher2014-06-091-0/+4
* [X86] Add target combine rules for horizontal add/sub.Andrea Di Biagio2014-06-091-0/+85
* [X86] Avoid emitting unnecessary test instructions.Andrea Di Biagio2014-06-091-2/+19
* [X86] Use ADD/SUB instead of INC/DEC for SilvermontAlexey Volkov2014-06-091-2/+2
* [C++11] Use 'nullptr'.Craig Topper2014-06-081-1/+1
* X86: Don't turn shifts into ands if there's another use that may not check fo...Benjamin Kramer2014-06-061-1/+1
* Fixed a bug in lowering shuffle_vectors to insertpsFilipe Cabecinhas2014-06-061-9/+20
* [X86] Fix checked arithmetic for i8 on X86.Andrea Di Biagio2014-06-021-2/+3
* Have the TLOF creation take a Triple rather than needing a subtarget.Eric Christopher2014-05-311-11/+8
* [X86] Add two combine rules to simplify dag nodes introduced during type lega...Andrea Di Biagio2014-05-301-0/+53
* Separate the check for blend shuffle_vector masksFilipe Cabecinhas2014-05-301-25/+42
* Delete dead code.Rafael Espindola2014-05-231-4/+0
* [X86] Improve the lowering of BITCAST from MVT::f64 to MVT::v4i16/MVT::v8i8.Andrea Di Biagio2014-05-221-18/+38
* [X86] Fix a bug in the lowering of BLENDI introduced in r209043.Quentin Colombet2014-05-211-3/+7
* Add parentheses to suppress the gcc warning '-Wparentheses'.Simon Atanasyan2014-05-201-2/+2
* Added more insertps optimizationsFilipe Cabecinhas2014-05-191-11/+49
* SDAG: Legalize vector BSWAP into a shuffle if the shuffle is legal but the bs...Benjamin Kramer2014-05-191-1/+17
* Target: remove old constructors for CallLoweringInfoSaleem Abdulrasool2014-05-171-13/+12
* [x86] Fix a bad predicate I spotted by inspection -- pshufhw and pshuflwChandler Carruth2014-05-171-2/+2
* Implemented special cases for PerformVSELECTCombine.Filipe Cabecinhas2014-05-161-0/+62
* Lower vselects into X86ISD::BLENDI when appropriate.Filipe Cabecinhas2014-05-161-1/+83
* Implemented LowerVSELECT to custom lower some instructions.Filipe Cabecinhas2014-05-161-16/+45
* Delete getAliasedGlobal.Rafael Espindola2014-05-161-1/+1
* [X86] Teach the backend how to fold SSE4.1/AVX/AVX2 blend intrinsics.Andrea Di Biagio2014-05-151-2/+54
* Fix typosAlp Toker2014-05-151-1/+1
* Rename ComputeMaskedBits to computeKnownBits. "Masked" has beenJay Foad2014-05-141-7/+7
* Try to fix an SDAG dependence issue with sretReid Kleckner2014-05-121-15/+18
* Silencing an MSVC warning about not all control paths returning a value (even...Aaron Ballman2014-05-121-0/+1
* X86: Make sure that we have SSE4.1 before we generate insertps nodes.Benjamin Kramer2014-05-121-1/+1
* X86ISelLowering.cpp:LowerINTRINSIC_W_CHAIN(): Prune impossible "default:" [-W...NAKAMURA Takumi2014-05-121-3/+0
* Fixed compilation issueElena Demikhovsky2014-05-121-0/+1
* AVX-512: changes in intrinsicsElena Demikhovsky2014-05-121-189/+165
* Pass the value type to TLI::getRegisterByNameHal Finkel2014-05-111-1/+2
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