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path: root/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
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* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-5/+5
* Remove redundant includes from lib/Target/X86.Michael Zolotukhin2017-12-131-3/+0
* Revert "[X86] Improvement in CodeGen instruction selection for LEAs."Matt Morehouse2017-12-011-82/+6
* [X86] Improvement in CodeGen instruction selection for LEAs.Jatin Bhateja2017-12-011-6/+82
* [X86] Teach isel that X86ISD::CMPM_RND zeros the upper bits of the mask regis...Craig Topper2017-11-231-1/+2
* [X86] Add an X86ISD::MSCATTER node for consistency with the X86ISD::MGATHER.Craig Topper2017-11-221-8/+3
* [X86] Allow X86ISD::Wrapper to be folded into the base of gather/scatter addressCraig Topper2017-11-131-20/+35
* [X86] Merge the template method selectAddrOfGatherScatterNode into selectVect...Craig Topper2017-11-101-25/+16
* [X86] Preserve memory refs when folding loads into divides.Craig Topper2017-11-081-1/+5
* [X86] Remove an if check on the result of a cast. NFCCraig Topper2017-11-081-12/+6
* [X86] Correct the implementation of BEXTR load folding to use the shift as th...Craig Topper2017-11-081-6/+14
* [X86][AVX512] Improve lowering of AVX512 test intrinsicsUriel Korach2017-11-061-4/+4
* [X86] Replace duplicate function call with variable. NFCUriel Korach2017-11-061-2/+2
* [X86] Fix a mistake in the X86ISelDAGToDAG.cpp code for MUL8r/IMUL8r.Craig Topper2017-10-281-1/+1
* [X86] Improve handling of UDIVREM8_ZEXT_HREG/SDIVREM8_SEXT_HREG to support 64...Craig Topper2017-10-261-13/+1
* Reverting r315590; it did not include changes for llvm-tblgen, which is causi...Aaron Ballman2017-10-151-1/+1
* [dump] Remove NDEBUG from test to enable dump methods [NFC]Don Hinton2017-10-121-1/+1
* [X86] Simplify some code in getInsertVINSERTImmediate and getExtractVEXTRACTI...Craig Topper2017-10-081-4/+2
* Revert r314886 "[X86] Improvement in CodeGen instruction selection for LEAs (...Hans Wennborg2017-10-041-79/+6
* [X86] Improvement in CodeGen instruction selection for LEAs (re-applying post...Jatin Bhateja2017-10-041-6/+79
* [X86] Don't select (cmp (and, imm), 0) to testwCraig Topper2017-09-281-1/+4
* [X86] Remove dead code from X86ISelDAGToDAG.cpp multiply handlingCraig Topper2017-09-281-1/+1
* [AVX-512] Replace large number of explicit patterns that check for insert_sub...Craig Topper2017-09-251-0/+35
* [X86] Move the getInsertVINSERTImmediate and getExtractVEXTRACTImmediate help...Craig Topper2017-09-231-0/+18
* [X86] Convert X86ISD::SELECT to ISD::VSELECT just before instruction selectio...Craig Topper2017-09-191-1/+2
* [X86] Don't emit COPY_TO_REG to ABCD registers before EXTRACT_SUBREG of sub_8bitCraig Topper2017-09-181-13/+0
* [X86] Don't emit COPY_TO_REG to ABCD registers before EXTRACT_SUBREG of sub_8...Craig Topper2017-09-181-12/+0
* Revert r313343 "[X86] PR32755 : Improvement in CodeGen instruction selection ...Hans Wennborg2017-09-151-79/+6
* [X86] PR32755 : Improvement in CodeGen instruction selection for LEAs.Jatin Bhateja2017-09-151-6/+79
* [X86] Make sure we emit a SUBREG_TO_REG after the MOV32ri when creating a BEX...Craig Topper2017-09-131-2/+9
* [X86] Use isUInt<32> to simplify some code. NFCCraig Topper2017-09-131-1/+1
* [X86] Move matching of (and (srl/sra, C), (1<<C) - 1) to BEXTR/BEXTRI instruc...Craig Topper2017-09-121-0/+92
* [X86] Call removeDeadNode when we're done doing custom isel for mul, div and ...Craig Topper2017-09-091-0/+6
* [X86] Use ReplaceNode instead of ReplaceUses when converting X86ISD::SHRUNKBL...Craig Topper2017-09-091-1/+1
* [x86] Fix GCC pedantic warnings about default arguments for lambdas.Chandler Carruth2017-09-081-6/+6
* [x86] Flesh out the custom ISel for RMW aritmetic ops with used flags toChandler Carruth2017-09-081-2/+32
* [x86] Extend the manual ISel of `add` and `sub` with both RMW memoryChandler Carruth2017-09-071-15/+142
* Mark Knights Landing as having slow two memory operand instructionsCraig Topper2017-08-291-1/+1
* [x86] Teach the backend to fold more read-modify-write memory operandsChandler Carruth2017-08-251-53/+73
* [X86] Use SDValue::getOpcode instead of calling getNode and calling getOpcode...Craig Topper2017-08-251-2/+2
* [X86] Use isUInt and isShiftedUInt instead of using our own masking and compa...Craig Topper2017-08-251-21/+13
* [x86] NFC: More refactoring to pave the way to extending this ISel logicChandler Carruth2017-08-251-36/+51
* [x86] NFC - Refactor the custom lowering of `(load; op; store)` RMW sequences.Chandler Carruth2017-08-251-49/+57
* [X86] When selecting sse_load_f32/f64 pattern, make sure there's only one use...Craig Topper2017-08-211-4/+22
* [X86] Merge all of the vecload and alignedload predicates into single predica...Craig Topper2017-08-191-0/+21
* [X86] Don't try to scale down if that exceeds the bitwidth.Davide Italiano2017-07-191-1/+4
* AVX-512: Lowering Masked Gather intrinsic - fixed a bugElena Demikhovsky2017-06-221-7/+21
* Remove ADDC, ADDE, SUBC, SUBE and SETCCE support from the X86 backend, use th...Amaury Sechet2017-06-011-2/+0
* Use SDValue::getOperand() helper. NFCI.Simon Pilgrim2017-05-121-22/+19
* Do not legalize large add with addc/adde, introduce addcarry and do it with u...Amaury Sechet2017-04-301-0/+1
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