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* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-6/+6
| | | | | | | | | Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. llvm-svn: 75379
* change isGlobalStubReference to take target flags instead of a MachineOperand.Chris Lattner2009-07-101-1/+1
| | | | llvm-svn: 75236
* convert some late code (called by regalloc and code emission)Chris Lattner2009-07-101-3/+3
| | | | | | | to use isGlobalStubReference instead of GVRequiresExtraLoad (which should really be part of isel). llvm-svn: 75234
* GVRequiresExtraLoad is now never used for calls, simplify it based on this.Chris Lattner2009-07-101-1/+1
| | | | llvm-svn: 75232
* convert a helper method to be a static function instead of a Chris Lattner2009-07-101-11/+14
| | | | | | template. Also convert it to take a MachineOperand instead of a GV* llvm-svn: 75227
* Implement changes from Chris's feedback.Torok Edwin2009-07-081-5/+4
| | | | | | Finish converting lib/Target. llvm-svn: 75043
* Start converting to new error handling API.Torok Edwin2009-07-081-6/+7
| | | | | | | cerr+abort -> llvm_report_error assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included) llvm-svn: 75018
* Add the Object Code Emitter class. Original patch by Aaron Gray, I did someBruno Cardoso Lopes2009-07-061-8/+9
| | | | | | cleanup, removed some #includes and moved Object Code Emitter out-of-line. llvm-svn: 74813
* fix a bunch of failures in the X86-64 JIT by tolerating RIP asChris Lattner2009-06-271-3/+5
| | | | | | a base register. We just ignore it for now. llvm-svn: 74374
* Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron GrayBruno Cardoso Lopes2009-06-011-44/+48
| | | | llvm-svn: 72697
* First patch in the direction of splitting MachineCodeEmitter in two subclasses:Bruno Cardoso Lopes2009-05-301-23/+55
| | | | | | JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray llvm-svn: 72631
* The MONITOR and MWAIT instructions have insufficient information forBill Wendling2009-05-281-3/+16
| | | | | | | | | | | decoding. Essentially, they both map to the same column in the "opcode extensions for one- and two-byte opcodes" table in the x86 manual. The RawFrm complicates decoding this. Instead, use opcode 0x01, prefix 0x01, and form MRM1r. Then have the code emitter special case these, a la [SML]FENCE. llvm-svn: 72556
* Avoid unneeded SIB byte encoding. Patch by Zoltan Varga.Evan Cheng2009-05-121-1/+2
| | | | llvm-svn: 71520
* Use X86AddrNumOperands instead of magic constant oneDale Johannesen2009-05-061-1/+2
| | | | | | | | | | more place. This fixes a bunch of x86-64 JIT regressions. (Introduced when the value of the magic constant changed in 68645. At the time apparently nobody noticed; failures were hidden in 70343-70439 by an unrelated bug, so showed up again as "new" failures in 70440.) llvm-svn: 71106
* Revert part of 70929 that has to do with determining whether a SIB byte is ↵Evan Cheng2009-05-051-2/+2
| | | | | | needed. It causes a lot of x86_64 JIT failures. llvm-svn: 70986
* - Avoid the longer SIB encoding on x86_64 when it's not needed.Evan Cheng2009-05-041-2/+2
| | | | | | | - Synchronize instruction length computation code in X86InstrInfo with code in X86CodeEmitter.cpp Patch by Zoltan Varga. llvm-svn: 70929
* Re-apply 68552.Rafael Espindola2009-04-081-19/+10
| | | | | | Tested by bootstrapping llvm-gcc and using that to build llvm. llvm-svn: 68645
* Temporarily revert r68552. This was causing a failure in the self-hosting LLVMBill Wendling2009-04-071-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | builds. --- Reverse-merging (from foreign repository) r68552 into '.': U test/CodeGen/X86/tls8.ll U test/CodeGen/X86/tls10.ll U test/CodeGen/X86/tls2.ll U test/CodeGen/X86/tls6.ll U lib/Target/X86/X86Instr64bit.td U lib/Target/X86/X86InstrSSE.td U lib/Target/X86/X86InstrInfo.td U lib/Target/X86/X86RegisterInfo.cpp U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86CodeEmitter.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86InstrInfo.h U lib/Target/X86/X86ISelDAGToDAG.cpp U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h U lib/Target/X86/X86ISelLowering.h U lib/Target/X86/X86InstrInfo.cpp U lib/Target/X86/X86InstrBuilder.h U lib/Target/X86/X86RegisterInfo.td llvm-svn: 68560
* Reduce code duplication on the TLS implementation.Rafael Espindola2009-04-071-19/+10
| | | | | | | | | | This introduces a small regression on the generated code quality in the case we are just computing addresses, not loading values. Will work on it and on X86-64 support. llvm-svn: 68552
* Have only one definition of X86AddrNumOperands.Rafael Espindola2009-03-281-3/+0
| | | | llvm-svn: 67949
* Make code a bit less brittle by no hardcoding the numberRafael Espindola2009-03-281-6/+12
| | | | | | of operands in an address in so many places. llvm-svn: 67945
* Re-apply 66024 with fixes: 1. Fixed indirect call to immediate address ↵Evan Cheng2009-03-121-1/+7
| | | | | | assembly. 2. Fixed JIT encoding by making the address pc-relative. llvm-svn: 66803
* Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids ↵Evan Cheng2008-12-101-1/+1
| | | | | | some overflow issues. Patch by Thomas Jablin. llvm-svn: 60828
* Eliminate a compile time warning.Evan Cheng2008-11-191-4/+6
| | | | llvm-svn: 59677
* Fix indentation.Dan Gohman2008-11-101-1/+1
| | | | llvm-svn: 59004
* Rename isGVNonLazyPtr to isIndirectSym to reflect how it will be used.Evan Cheng2008-11-101-13/+13
| | | | llvm-svn: 58949
* Rename isGVLazyPtr to isGVNonLazyPtr relocation. This represents Mac OS XEvan Cheng2008-11-051-16/+16
| | | | | | indirect gv reference. Please don't call it lazy. llvm-svn: 58746
* x86_64 rip-relative and magic mode addressMon P Wang2008-10-311-4/+8
| | | | llvm-svn: 58528
* Generate code for TLS instructions.Nicolas Geoffray2008-10-251-0/+17
| | | | llvm-svn: 58141
* Fix constant-offset emission for x86-64 absolute addresses. ThisDan Gohman2008-10-241-11/+19
| | | | | | | fixes a bunch of test-suite JIT failures on x86-64 in -relocation-model=static mode. llvm-svn: 58066
* Fix lfence and mfence encoding. These look like MRM5r and MRM6r instructions ↵Evan Cheng2008-10-171-3/+15
| | | | | | except they do not have any operands. The RegModRM byte is encoded with register number 0. llvm-svn: 57692
* Update size of inst correctly with segment override.Anton Korobeynikov2008-10-121-0/+2
| | | | llvm-svn: 57414
* Fix comment typo.Duncan Sands2008-10-111-1/+1
| | | | llvm-svn: 57381
* Add ability to override segment (mostly for code emitter purposes).Anton Korobeynikov2008-10-111-0/+10
| | | | llvm-svn: 57380
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-30/+30
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-041-2/+2
| | | | llvm-svn: 55779
* Allow inline asm nodes with empty bodies inside JIT.Anton Korobeynikov2008-08-211-2/+6
| | | | | | | This unbreaks explicit reg vars inside JIT, which are implemented in such hacky way :) llvm-svn: 55128
* Clean up whitespace.Bill Wendling2008-08-211-5/+7
| | | | llvm-svn: 55117
* Make x86-64 JIT changes Darwin-specific.Dale Johannesen2008-08-121-1/+12
| | | | llvm-svn: 54700
* In the absence of a linker to build the GOT, use the 32-bitDale Johannesen2008-08-121-1/+3
| | | | | | | non_lazy_ptr mechanism on x86-64 Darwin JIT. Fixes a bunch of last night's failures. llvm-svn: 54692
* Some fixes for x86-64 JIT. Make it use small codeDale Johannesen2008-08-111-12/+8
| | | | | | | | | | | | model, except for external calls; this makes addressing modes PC-relative. Incomplete. The assertion at the top of Emitter::runOnMachineFunction was obviously bogus (always true) so I removed it. If someone knows what the correct test should be to cover all the various targets, please fix. llvm-svn: 54656
* Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman2008-07-011-1/+2
| | | | | | | | | | | | | | | | the need for a flavor operand, and add a new SDNode subclass, LabelSDNode, for use with them to eliminate the need for a label id operand. Change instruction selection to let these label nodes through unmodified instead of creating copies of them. Teach the MachineInstr emitter how to emit a MachineInstr directly from an ISD label node. This avoids the need for allocating SDNodes for the label id and flavor value, as well as SDNodes for each of the post-isel label, label id, and label flavor. llvm-svn: 52943
* runOnMachineFunction should set IsPIC because relocation model may have been ↵Evan Cheng2008-05-201-0/+1
| | | | | | changed. llvm-svn: 51291
* Change target-specific classes to use more precise static types.Dan Gohman2008-05-141-7/+7
| | | | | | | This eliminates the need for several awkward casts, including the last dynamic_cast under lib/Target. llvm-svn: 51091
* - Fix atomic operation JIT encoding.Evan Cheng2008-04-181-1/+4
| | | | | | - Remove unused instructions. llvm-svn: 49921
* Infrastructure for getting the machine code size of a function and an ↵Nicolas Geoffray2008-04-161-147/+12
| | | | | | instruction. X86, PowerPC and ARM are implemented llvm-svn: 49809
* Fix x86-64 encoding bug. REX prefix must always follow 0x0F prefix. For ↵Evan Cheng2008-04-031-10/+13
| | | | | | example, extractps in 64bit mode: 66 REX 0F 3A 17, not 66 0F 3A REX 17. llvm-svn: 49157
* Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF.Evan Cheng2008-03-171-0/+1
| | | | llvm-svn: 48447
* Replace all target specific implicit def instructions with a target ↵Evan Cheng2008-03-151-8/+0
| | | | | | independent one: TargetInstrInfo::IMPLICIT_DEF. llvm-svn: 48380
* Add debugging stuff.Evan Cheng2008-03-141-0/+4
| | | | llvm-svn: 48359
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