summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/X86CodeEmitter.cpp
diff options
context:
space:
mode:
authorTorok Edwin <edwintorok@gmail.com>2009-07-11 20:10:48 +0000
committerTorok Edwin <edwintorok@gmail.com>2009-07-11 20:10:48 +0000
commit56d065972602c45a4109617f32eb8605e5017c5e (patch)
treeb74a0d6b8aa7cbcafe15f8128196d5afc60cf732 /llvm/lib/Target/X86/X86CodeEmitter.cpp
parent3085b57bb8e47561fc290ea6bbbea92f08250a2d (diff)
downloadbcm5719-llvm-56d065972602c45a4109617f32eb8605e5017c5e.tar.gz
bcm5719-llvm-56d065972602c45a4109617f32eb8605e5017c5e.zip
assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. llvm-svn: 75379
Diffstat (limited to 'llvm/lib/Target/X86/X86CodeEmitter.cpp')
-rw-r--r--llvm/lib/Target/X86/X86CodeEmitter.cpp12
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp
index e3161e59890..acaeea33b13 100644
--- a/llvm/lib/Target/X86/X86CodeEmitter.cpp
+++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp
@@ -335,7 +335,7 @@ void Emitter<CodeEmitter>::emitDisplacementField(const MachineOperand *RelocOp,
unsigned rt = Is64BitMode ? X86::reloc_pcrel_word : X86::reloc_picrel_word;
emitJumpTableAddress(RelocOp->getIndex(), rt, PCAdj);
} else {
- assert(0 && "Unknown value to relocate!");
+ LLVM_UNREACHABLE("Unknown value to relocate!");
}
}
@@ -478,7 +478,7 @@ void Emitter<CodeEmitter>::emitInstruction(
case X86II::GS:
MCE.emitByte(0x65);
break;
- default: assert(0 && "Invalid segment!");
+ default: LLVM_UNREACHABLE("Invalid segment!");
case 0: break; // No segment override!
}
@@ -513,7 +513,7 @@ void Emitter<CodeEmitter>::emitInstruction(
(((Desc->TSFlags & X86II::Op0Mask)-X86II::D8)
>> X86II::Op0Shift));
break; // Two-byte opcode prefix
- default: assert(0 && "Invalid prefix!");
+ default: LLVM_UNREACHABLE("Invalid prefix!");
case 0: break; // No prefix!
}
@@ -548,13 +548,13 @@ void Emitter<CodeEmitter>::emitInstruction(
unsigned char BaseOpcode = II->getBaseOpcodeFor(Desc);
switch (Desc->TSFlags & X86II::FormMask) {
- default: assert(0 && "Unknown FormMask value in X86 MachineCodeEmitter!");
+ default: LLVM_UNREACHABLE("Unknown FormMask value in X86 MachineCodeEmitter!");
case X86II::Pseudo:
// Remember the current PC offset, this is the PIC relocation
// base address.
switch (Opcode) {
default:
- assert(0 && "psuedo instructions should be removed before code emission");
+ LLVM_UNREACHABLE("psuedo instructions should be removed before code emission");
break;
case TargetInstrInfo::INLINEASM: {
// We allow inline assembler nodes with empty bodies - they can
@@ -620,7 +620,7 @@ void Emitter<CodeEmitter>::emitInstruction(
} else
emitConstant(MO.getImm(), X86InstrInfo::sizeOfImm(Desc));
} else {
- assert(0 && "Unknown RawFrm operand!");
+ LLVM_UNREACHABLE("Unknown RawFrm operand!");
}
}
break;
OpenPOWER on IntegriCloud