| Commit message (Collapse) | Author | Age | Files | Lines |
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been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.
llvm-svn: 115360
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use MC instructions in the printInstruction() method via the tablegen flag
for it rather than a #define prior to including the autogenerated bits.
llvm-svn: 115238
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times. This patch causes llc and llvm-mc (which both default to
verbose-asm) to print out comments after a few common shuffle
instructions which indicates the shuffle mask, e.g.:
insertps $113, %xmm3, %xmm0 ## xmm0 = zero,xmm0[1,2],xmm3[1]
unpcklps %xmm1, %xmm0 ## xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
pshufd $1, %xmm1, %xmm1 ## xmm1 = xmm1[1,0,0,0]
This is carefully factored to keep the information extraction (of the
shuffle mask) separate from the printing logic. I plan to move the
extraction part out somewhere else at some point for other parts of
the x86 backend that want to introspect on the behavior of shuffles.
llvm-svn: 112387
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like all other instructions, even though a segment is not
allowed. This resolves a bunch of gross hacks in the
encoder and makes LEA more consistent with the rest of the
instruction set.
No functionality change.
llvm-svn: 107934
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raw_ostream to print an instruction to had to be specified
at MCInstPrinter construction time instead of being able
to pick at each call to printInstruction.
llvm-svn: 100307
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member of AsmPrinter. Instead, pass it in explicitly.
llvm-svn: 100306
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64 bits, fixing a variety of problems.
llvm-svn: 96421
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testb %al, %al ## <MCInst #2412 TEST8rr
## <MCOperand Reg:2>
## <MCOperand Reg:2>>
jne LBB1_7 ## <MCInst #938 JNE_1
## <MCOperand Expr:(LBB1_7)>>
llvm-svn: 95935
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Enhance the x86 backend to show the hex values of immediates in
comments when they are large. For example:
movl $1072693248, 4(%esp) ## imm = 0x3FF00000
llvm-svn: 95728
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than DEBUG_VALUE :( ) into the target indep AsmPrinter.cpp
file. This allows elimination of the
NO_ASM_WRITER_BOILERPLATE hack among other things.
llvm-svn: 95177
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printing them.
llvm-svn: 93699
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get things like this out of the disassembler:
0x100000ecb: callq -96
instead of:
0x100000ecb: callq 4294967200
rdar://7491123
llvm-svn: 91864
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All of these "subreg32" modifier instructions are handled
explicitly by the MCInst lowering phase. If they got to
the asmprinter, they would explode. They should eventually
be replace with correct use of subregs.
llvm-svn: 84526
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the MachineInstr ->MCInst lowering process, not in the
asmprinter.
llvm-svn: 82388
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causes the "../foo" to not find the file
llvm-svn: 82270
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exceeds 32-bits.
llvm-svn: 82235
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be a MCInstPrinter.
llvm-svn: 81746
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llvm-svn: 81744
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of getting it from TRI, inst printing now is codegen context
free!
llvm-svn: 81710
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all the other targets. Add support for weak/linkonce linkage so it doesn't
crash on basically all nontrivial testcases.
llvm-svn: 81704
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class into its own X86ATTInstPrinter class. The inst
printer now has just one dependence on the code generator
(TRI).
llvm-svn: 81703
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MBB labels like everything else.
llvm-svn: 81628
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llvm-svn: 81304
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and fix a few things using << on MCSymbols to use ->print(). No
functionality change other than unbreaking my previous patch.
llvm-svn: 80890
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Also, use MCInst::print instead of custom code in MCAsmPrinter.
llvm-svn: 80575
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llvm-svn: 79777
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llvm-svn: 79763
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llvm-svn: 78984
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own struct type.
llvm-svn: 78610
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dynamic_cast<>.
llvm-svn: 75670
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This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
llvm-svn: 75640
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llvm-svn: 75630
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Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
llvm-svn: 75379
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Finish converting lib/Target.
llvm-svn: 75043
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cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)
llvm-svn: 75018
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implementation primarily differs from the former in that the asmprinter
doesn't make a zillion decisions about whether or not something will be
RIP relative or not. Instead, those decisions are made by isel lowering
and propagated through to the asm printer. To achieve this, we:
1. Represent RIP relative addresses by setting the base of the X86 addr
mode to X86::RIP.
2. When ISel Lowering decides that it is safe to use RIP, it lowers to
X86ISD::WrapperRIP. When it is unsafe to use RIP, it lowers to
X86ISD::Wrapper as before.
3. This removes isRIPRel from X86ISelAddressMode, representing it with
a basereg of RIP instead.
4. The addressing mode matching logic in isel is greatly simplified.
5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
passed through various printoperand routines is gone now.
6. The various symbol printing routines in asmprinter now no longer infer
when to emit (%rip), they just print the symbol.
I think this is a big improvement over the previous situation. It does have
two small caveats though: 1. I implemented a horrible "no-rip" modifier for
the inline asm "P" constraint modifier. This is a short term hack, there is
a much better, but more involved, solution. 2. I had to xfail an
-aggressive-remat testcase because it isn't handling the use of RIP in the
constant-pool reading instruction. This specific test is easy to fix without
-aggressive-remat, which I intend to do next.
llvm-svn: 74372
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llvm-svn: 73837
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with MBB's.
llvm-svn: 73830
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it as a pcrel immediate instead. This gets pc-rel weirdness out of the
main printoperand codepath.
llvm-svn: 73829
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llvm-svn: 73824
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llvm-svn: 73818
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LEA64_32r, eliminating a bunch of modifier logic stuff on addr modes.
Implement support for printing mbb labels as operands.
llvm-svn: 73817
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llvm-svn: 73811
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step is to make tblgen generate something more appropriate for MCInst,
and generate calls to operand translation routines where needed.
This includes a bunch of #if 0 code which will slowly be refactored into
something sensible.
llvm-svn: 73810
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on X86. Not useful yet.
llvm-svn: 73799
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llvm-svn: 73744
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