| Commit message (Collapse) | Author | Age | Files | Lines |
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been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.
llvm-svn: 115360
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use MC instructions in the printInstruction() method via the tablegen flag
for it rather than a #define prior to including the autogenerated bits.
llvm-svn: 115238
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This reverts commit r113632
Conflicts:
cmake/modules/AddLLVM.cmake
llvm-svn: 113819
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llvm-svn: 113632
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llvm-svn: 112896
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lowering, and fix movlhps/movhlps to decode 4 elements shuffles
llvm-svn: 112869
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to be used elsewhere. Also trim trailing whitespaces
llvm-svn: 112846
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llvm-svn: 112397
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times. This patch causes llc and llvm-mc (which both default to
verbose-asm) to print out comments after a few common shuffle
instructions which indicates the shuffle mask, e.g.:
insertps $113, %xmm3, %xmm0 ## xmm0 = zero,xmm0[1,2],xmm3[1]
unpcklps %xmm1, %xmm0 ## xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
pshufd $1, %xmm1, %xmm1 ## xmm1 = xmm1[1,0,0,0]
This is carefully factored to keep the information extraction (of the
shuffle mask) separate from the printing logic. I plan to move the
extraction part out somewhere else at some point for other parts of
the x86 backend that want to introspect on the behavior of shuffles.
llvm-svn: 112387
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llvm-svn: 108787
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of AsmPrinter and InstLowering into libx86 and out of the
asmprinter subdirectory. Now X86/AsmPrinter just depends on
MC stuff, not all of codegen and LLVM IR.
llvm-svn: 108782
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llvm-svn: 108769
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llvm-svn: 108545
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llvm-svn: 108368
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patch by Michael Spencer!
llvm-svn: 108342
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notes:
- The instructions are being added with dummy placeholder patterns using some 256
specifiers, this is not meant to work now, but since there are some multiclasses
generic enough to accept them, when we go for codegen, the stuff will be already
there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
file.
llvm-svn: 107996
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jumps where possible and turning the TAILCALL marker in the instruction
asm string into a proper comment.
This eliminates a FIXME and is on the path to finishing:
rdar://7639610 - eliminate encoding and asm info for TAILJMPd TAILJMPr TAILJMPn, etc.
However, I can't eliminate the encodings for these instructions because the JIT
still exists and has its own copy of the encoder, sigh.
llvm-svn: 107946
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llvm-svn: 107939
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like all other instructions, even though a segment is not
allowed. This resolves a bunch of gross hacks in the
encoder and makes LEA more consistent with the rest of the
instruction set.
No functionality change.
llvm-svn: 107934
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llvm-svn: 107818
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print the (%rip) only if the 'a' modifier is present.
PR 7528.
llvm-svn: 107727
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llvm-svn: 107678
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TLVP:
movl _a@TLVP, %eax
Daniel: Please review if you get a chance.
llvm-svn: 106194
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llvm-svn: 105381
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prefix byte problem as in r104062.
- As a total hack to keep the TAILCALL markers in the output, which some tests depend on, this invents a new TAILJMP_1 instruction.
llvm-svn: 104120
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CALL64pcrel32, for the same reason.
llvm-svn: 104116
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llvm-svn: 104112
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avoid same prefix byte problem as in r104062.
llvm-svn: 104108
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The register use operands (e.g. the first argument is passed in a
register) is currently being modeled as a normal register use,
instead of correctly being an implicit use. This causes the operand
to get propagated onto the mcinst, which was causing the encoder to
emit a rex prefix byte, which generates an invalid call.
This fixes rdar://7998435
llvm-svn: 104062
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X86::ADC32ri $0, %eax
to
X86::ADC32i32 $0
llvm-svn: 104030
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to LLVM_LIBRARY_VISIBILITY and introduce LLVM_GLOBAL_VISIBILITY, which is
the opposite, for future use by dragonegg.
llvm-svn: 103495
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changed dllexport code to use EmitBytes instead of EmitRawText, and changed the export option to use /EXPORT: instead of -export: on the windows platform
llvm-svn: 103377
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llvm-svn: 103373
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patch by Nathan Jeffords!
llvm-svn: 103346
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llvm-svn: 103276
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patch by Peter Housel!
llvm-svn: 103267
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##DEBUG_VALUE: runOnMachineFunction:this <- RDI+0
##DEBUG_VALUE: runOnMachineFunction:fn <- RSI+0
##DEBUG_VALUE: DeadDefs <- undef ## SimpleRegisterCoalescing.cpp:2706
##DEBUG_VALUE: getRegInfo:this <- [%rsp+$56]+$0
##DEBUG_VALUE: getTarget:this <- [%rsp+$56]+$0
llvm-svn: 102655
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llvm-svn: 102486
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llvm-svn: 101640
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llvm-svn: 101639
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relocation. rdar://7738756
llvm-svn: 101085
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api and update clients to use MCContext instead.
llvm-svn: 100808
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into AsmPrinter. Target-dependent form is still generated
by FastISel and still handled in X86 code.
llvm-svn: 100596
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llvm-svn: 100578
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There is probably a more elegant way to do this.
llvm-svn: 100573
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llvm-svn: 100377
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llvm-svn: 100376
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llvm-svn: 100342
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"asm printering" happens through MCStreamer. This also
Streamerizes PIC16 debug info, which escaped my attention.
This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.
llvm-svn: 100327
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streamerized for everything.
llvm-svn: 100316
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