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* [WebAssembly] Fix select of and (PR40805)Nikita Popov2019-02-231-7/+0
| | | | | | | | | | | | | Fixes https://bugs.llvm.org/show_bug.cgi?id=40805 introduced by patterns added in D53676. I'm removing the patterns entirely here, as they are not correct in the general case. If necessary something more specific can be added in the future. Differential Revision: https://reviews.llvm.org/D58575 llvm-svn: 354733
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
| | | | | | | | | | | | | | | | | to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
* [WebAssembly] Lower away condition truncations for scalar selectsThomas Lively2018-10-291-0/+7
| | | | | | | | | | Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D53676 llvm-svn: 345521
* [WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS] (fixed)Thomas Lively2018-10-111-9/+0
| | | | llvm-svn: 344287
* [WebAssembly] Revert rL344180, which was breaking expensive checksThomas Lively2018-10-111-0/+9
| | | | llvm-svn: 344280
* [WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS]Thomas Lively2018-10-101-9/+0
| | | | | | | | | | | | | Summary: By moving that line into the `I` multiclass. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D53093 llvm-svn: 344180
* [WebAssembly][NFC] Move specific instruction formats to specific filesThomas Lively2018-08-231-0/+34
| | | | | | | | | | | | | | Summary: WebAssemblyInstrFormats.td retains only multiclasses that are used in multiple other tablegen files. Reviewers: aheejin, dschuff Subscribers: sbc100, jgravelle-google, sunfish, jfb, llvm-commits Differential Revision: https://reviews.llvm.org/D51143 llvm-svn: 340503
* [WebAssembly] Modified tablegen defs to have 2 parallel instuction sets.Wouter van Oortmerssen2018-06-181-12/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: One for register based, much like the existing definitions, and one for stack based (suffix _S). This allows us to use registers in most of LLVM (which works better), and stack based in MC (which results in a simpler and more readable assembler / disassembler). Tried to keep this change as small as possible while passing tests, follow-up commit will: - Add reg->stack conversion in MI. - Fix asm/disasm in MC to be stack based. - Fix emitter to be stack based. tests passing: llvm-lit -v `find test -name WebAssembly` test/CodeGen/WebAssembly test/MC/WebAssembly test/MC/Disassembler/WebAssembly test/DebugInfo/WebAssembly test/CodeGen/MIR/WebAssembly test/tools/llvm-objdump/WebAssembly Reviewers: dschuff, sbc100, jgravelle-google, sunfish Subscribers: aheejin, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D48183 llvm-svn: 334985
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-011-1/+1
| | | | | | | | | | | | | | | | We've been running doxygen with the autobrief option for a couple of years now. This makes the \brief markers into our comments redundant. Since they are a visual distraction and we don't want to encourage more \brief markers in new code either, this patch removes them all. Patch produced by for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done Differential Revision: https://reviews.llvm.org/D46290 llvm-svn: 331272
* [WebAssembly] Fix the opcode values for i64.eq and i64.ne.Dan Gohman2017-01-091-2/+2
| | | | llvm-svn: 291424
* [WebAssembly] Fix the opcode value for i64.rotr.Dan Gohman2016-12-211-1/+1
| | | | llvm-svn: 290281
* [WebAssembly] Implement more WebAssembly binary encoding.Dan Gohman2016-10-241-2/+2
| | | | | | | | | | | | This changes locals from being declared by the emitLocal hook in WebAssemblyTargetStreamer, rather than with an instruction. After exploring the infastructure in LLVM more, this seems to make more sense since declaring locals doesn't use an encoded opcode. This also adds more 0xd opcodes, type encodings, and miscellaneous binary encoding bits. llvm-svn: 285040
* [WebAssembly] Update opcode values according to recent spec changes.Dan Gohman2016-10-241-30/+30
| | | | | | This corresponds to the "0xd" opcode renumbering. llvm-svn: 285014
* [WebAssembly] Add binary-encoding opcode values to instruction descriptions.Dan Gohman2016-10-051-30/+30
| | | | llvm-svn: 283389
* [WebAssembly] Set ctlz_zero_undef/cttz_zero_undef to Expand so LegalizeDAG ↵Craig Topper2016-04-231-6/+0
| | | | | | will convert them to ctlz/cttz. Remove the now unneccessary isel patterns. NFC llvm-svn: 267264
* [WebAssembly] Implement the rotate instructions.Dan Gohman2016-03-221-0/+8
| | | | llvm-svn: 264076
* [WebAssembly] Implement the eqz instructions.Dan Gohman2016-03-211-0/+7
| | | | llvm-svn: 263976
* [WebAssembly] Update the select instructions' operand orders to match the spec.Dan Gohman2016-02-051-8/+8
| | | | llvm-svn: 259893
* [WebAssembly] Set several MCInstrDesc flags.Dan Gohman2015-11-291-0/+9
| | | | llvm-svn: 254271
* [WebAssembly] Fold setne and seteq comparisons into selects.Dan Gohman2015-11-251-0/+14
| | | | llvm-svn: 254104
* [WebAssembly] Use a physical register to describe ARGUMENT liveness.Dan Gohman2015-11-251-0/+8
| | | | | | | | | | Instead of trying to move ARGUMENT instructions back up to the top after they've been scheduled or sunk down, use a fake physical register to create a liveness constraint that prevents ARGUMENT instructions from moving down in the first place. This is still not entirely ideal, however it is more robust than letting them move and moving them back. llvm-svn: 254084
* [WebAssembly] Add some spaces to the assembly output to vertically align ↵Dan Gohman2015-11-181-11/+13
| | | | | | operands. llvm-svn: 253468
* [WebAssembly] Use tabs instead of spaces in assembly output.Dan Gohman2015-11-151-2/+2
| | | | | | This seems to be the most popular convention among the other backends. llvm-svn: 253172
* [WebAssembly] Fix copypasta.Dan Gohman2015-11-051-1/+1
| | | | | | Noticed by dschff in http://reviews.llvm.org/rL252203 llvm-svn: 252208
* [WebAssembly] Add AsmString strings for most instructions.Dan Gohman2015-11-051-28/+30
| | | | | | | | | Mangling type information into MachineInstr opcode names was a temporary measure, and it's starting to get hairy. At the same time, the MC instruction printer wants to use AsmString strings for printing. This patch takes the first step, starting the process of adding AsmStrings for instructions. llvm-svn: 252203
* [WebAssembly] Rename ior operator to or to match the specDerek Schuff2015-11-051-1/+1
| | | | | | | | | | | | Summary: The spec uses "or" for inclusive-or and "xor" for exclusive-or Reviewers: sunfish Subscribers: jfb, llvm-commits, dschuff Differential Revision: http://reviews.llvm.org/D14362 llvm-svn: 252174
* Align whitespaceDerek Schuff2015-11-031-2/+2
| | | | llvm-svn: 252003
* [WebAssembly] Support wasm select operatorDerek Schuff2015-11-031-0/+5
| | | | | | | | | | | | | | Summary: Add support for wasm's select operator, and lower LLVM's select DAG node to it. Reviewers: sunfish Subscribers: dschuff, llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D14295 llvm-svn: 252002
* WebAssembly: fix more syntaxJF Bastien2015-10-221-4/+4
| | | | | | | br_if shouldn't start with a dot. div and rem went from prefix u/s to suffix. llvm-svn: 250972
* WebAssembly: fix the syntax for comparisonsJF Bastien2015-10-171-8/+8
| | | | | | | | | | | | Summary: It has also slightly changed. Reviewers: binji Subscribers: jfb, dschuff, llvm-commits, sunfish Differential Revision: http://reviews.llvm.org/D13837 llvm-svn: 250591
* [WebAssembly] Rename several functions and types according to the new spec.Dan Gohman2015-09-261-4/+4
| | | | llvm-svn: 248644
* WebAssembly: NFC rename shr/sarJF Bastien2015-09-081-2/+2
| | | | | | Renamed from: https://github.com/WebAssembly/design/pull/332 llvm-svn: 247028
* [WebAssembly] Implement the is_zero_undef forms of cttz and ctlzDan Gohman2015-08-241-0/+6
| | | | llvm-svn: 245851
* WebAssembly: implement comparison.JF Bastien2015-08-111-13/+10
| | | | | | | | | | | | Some of the FP comparisons (ueq, one, ult, ule, ugt, uge) are currently broken, I'll fix them in a follow-up. Reviewers: sunfish Subscribers: llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11924 llvm-svn: 244665
* WebAssembly: add basic int/fp instruction codegen.JF Bastien2015-07-141-16/+18
| | | | | | | | | | | | Summary: This patch has the most basic instruction codegen for 32 and 64 bit int/fp. Reviewers: sunfish Subscribers: llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11193 llvm-svn: 242201
* WebAssembly: basic instructions todo, and basic register info.JF Bastien2015-07-101-0/+43
Summary: This code is based on AArch64 for modern backend good practice, and NVPTX for virtual ISA concerns. Reviewers: sunfish Subscribers: aemerson, llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11070 llvm-svn: 241923
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