[WebAssembly] Add AsmString strings for most instructions.

Mangling type information into MachineInstr opcode names was a temporary
measure, and it's starting to get hairy. At the same time, the MC instruction
printer wants to use AsmString strings for printing. This patch takes the
first step, starting the process of adding AsmStrings for instructions.

llvm-svn: 252203

1 files changed, 30 insertions, 28 deletions

diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInteger.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInteger.td
index 6f8ed758148..d38be099332 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInteger.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInteger.td
@@ -12,34 +12,34 @@
 ///
 //===----------------------------------------------------------------------===//
 
-defm ADD : BinaryInt<add>;
-defm SUB : BinaryInt<sub>;
-defm MUL : BinaryInt<mul>;
-defm DIV_S : BinaryInt<sdiv>;
-defm DIV_U : BinaryInt<udiv>;
-defm REM_S : BinaryInt<srem>;
-defm REM_U : BinaryInt<urem>;
-defm AND : BinaryInt<and>;
-defm OR : BinaryInt<or>;
-defm XOR : BinaryInt<xor>;
-defm SHL : BinaryInt<shl>;
-defm SHR_U : BinaryInt<srl>;
-defm SHR_S : BinaryInt<sra>;
+defm ADD : BinaryInt<add, "add">;
+defm SUB : BinaryInt<sub, "sub">;
+defm MUL : BinaryInt<mul, "mul">;
+defm DIV_S : BinaryInt<sdiv, "div_s">;
+defm DIV_U : BinaryInt<udiv, "div_u">;
+defm REM_S : BinaryInt<srem, "rem_s">;
+defm REM_U : BinaryInt<urem, "rem_u">;
+defm AND : BinaryInt<and, "and">;
+defm OR : BinaryInt<or, "or">;
+defm XOR : BinaryInt<xor, "xor">;
+defm SHL : BinaryInt<shl, "shl">;
+defm SHR_U : BinaryInt<srl, "shr_u">;
+defm SHR_S : BinaryInt<sra, "shr_s">;
 
-defm EQ : ComparisonInt<SETEQ>;
-defm NE : ComparisonInt<SETNE>;
-defm LT_S : ComparisonInt<SETLT>;
-defm LE_S : ComparisonInt<SETLE>;
-defm LT_U : ComparisonInt<SETULT>;
-defm LE_U : ComparisonInt<SETULE>;
-defm GT_S : ComparisonInt<SETGT>;
-defm GE_S : ComparisonInt<SETGE>;
-defm GT_U : ComparisonInt<SETUGT>;
-defm GE_U : ComparisonInt<SETUGE>;
+defm EQ : ComparisonInt<SETEQ, "eq">;
+defm NE : ComparisonInt<SETNE, "ne">;
+defm LT_S : ComparisonInt<SETLT, "lt_s">;
+defm LE_S : ComparisonInt<SETLE, "le_s">;
+defm LT_U : ComparisonInt<SETULT, "lt_u">;
+defm LE_U : ComparisonInt<SETULE, "le_u">;
+defm GT_S : ComparisonInt<SETGT, "gt_s">;
+defm GE_S : ComparisonInt<SETGE, "ge_s">;
+defm GT_U : ComparisonInt<SETUGT, "gt_u">;
+defm GE_U : ComparisonInt<SETUGE, "ge_u">;
 
-defm CLZ : UnaryInt<ctlz>;
-defm CTZ : UnaryInt<cttz>;
-defm POPCNT : UnaryInt<ctpop>;
+defm CLZ : UnaryInt<ctlz, "clz">;
+defm CTZ : UnaryInt<cttz, "ctz">;
+defm POPCNT : UnaryInt<ctpop, "popcnt">;
 
 // Expand the "don't care" operations to supported operations.
 def : Pat<(ctlz_zero_undef I32:$src), (CLZ_I32 I32:$src)>;
@@ -48,6 +48,8 @@ def : Pat<(cttz_zero_undef I32:$src), (CTZ_I32 I32:$src)>;
 def : Pat<(cttz_zero_undef I64:$src), (CTZ_I64 I64:$src)>;
 
 def SELECT_I32 : I<(outs I32:$dst), (ins I32:$cond, I32:$lhs, I32:$rhs),
-                   [(set I32:$dst, (select I32:$cond, I32:$lhs, I32:$rhs))]>;
+                   [(set I32:$dst, (select I32:$cond, I32:$lhs, I32:$rhs))],
+                   "i32.select $dst, $cond, $lhs, $rhs">;
 def SELECT_I64 : I<(outs I64:$dst), (ins I32:$cond, I64:$lhs, I64:$rhs),
-                   [(set I64:$dst, (select I32:$cond, I64:$lhs, I64:$rhs))]>;
+                   [(set I64:$dst, (select I32:$cond, I64:$lhs, I64:$rhs))],
+                   "i32.select $dst, $cond, $lhs, $rhs">;