Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | Add sub-registers sets. | Evan Cheng | 2007-04-20 | 1 | -1/+16 | |
| | | | | llvm-svn: 36278 | |||||
* | Added isReMaterializable. | Evan Cheng | 2007-03-19 | 1 | -0/+1 | |
| | | | | llvm-svn: 35160 | |||||
* | Add calling convention info | Chris Lattner | 2007-02-27 | 1 | -1/+6 | |
| | | | | llvm-svn: 34661 | |||||
* | Fix typos in comments. | Dan Gohman | 2007-02-20 | 1 | -1/+1 | |
| | | | | llvm-svn: 34456 | |||||
* | Make LABEL a builtin opcode. | Jim Laskey | 2007-01-26 | 1 | -0/+6 | |
| | | | | llvm-svn: 33537 | |||||
* | Comment. | Evan Cheng | 2007-01-12 | 1 | -1/+1 | |
| | | | | llvm-svn: 33114 | |||||
* | add a new field needed by the code emitter generator. | Chris Lattner | 2006-11-15 | 1 | -0/+4 | |
| | | | | llvm-svn: 31768 | |||||
* | initial steps to getting the predicate on PPC::BLR right. | Chris Lattner | 2006-11-03 | 1 | -0/+11 | |
| | | | | llvm-svn: 31437 | |||||
* | remove dead var | Chris Lattner | 2006-11-03 | 1 | -1/+0 | |
| | | | | llvm-svn: 31436 | |||||
* | Add constraints to Instruction class. | Evan Cheng | 2006-11-01 | 1 | -0/+2 | |
| | | | | llvm-svn: 31332 | |||||
* | Move the Imp tblgen class from the X86 backend to common code. | Chris Lattner | 2006-10-12 | 1 | -0/+7 | |
| | | | | llvm-svn: 30907 | |||||
* | Add code size to target instruction use it as the 3rd isel sorting tie-breaker. | Evan Cheng | 2006-07-19 | 1 | -0/+3 | |
| | | | | llvm-svn: 29193 | |||||
* | Added a Flags field to TargetOperandInfo. Currently the only flag is | Evan Cheng | 2006-05-18 | 1 | -0/+6 | |
| | | | | | | | M_LOOK_UP_PTR_REG_CLASS which allows the register class of the operand to be resolved via a callback at runtime. llvm-svn: 28387 | |||||
* | Remove CalleeSavedRegisters from class Target. | Evan Cheng | 2006-05-18 | 1 | -4/+0 | |
| | | | | llvm-svn: 28377 | |||||
* | Remove PointerType from class Target | Evan Cheng | 2006-05-17 | 1 | -4/+0 | |
| | | | | llvm-svn: 28368 | |||||
* | Replace "../whatever.td" with "whatever.td", so that out-of-tree backends | Vladimir Prus | 2006-05-16 | 1 | -2/+2 | |
| | | | | | | can just add lib/Target to TableGen includes. llvm-svn: 28318 | |||||
* | Improve comment, patch provided by Vladimir Prus! | Chris Lattner | 2006-05-15 | 1 | -1/+3 | |
| | | | | llvm-svn: 28307 | |||||
* | Update comment. | Chris Lattner | 2006-05-14 | 1 | -2/+3 | |
| | | | | llvm-svn: 28283 | |||||
* | Put PHI/INLINEASM into the correct namespace. | Chris Lattner | 2006-05-01 | 1 | -0/+2 | |
| | | | | llvm-svn: 28037 | |||||
* | Renamed AddedCost to AddedComplexity. | Evan Cheng | 2006-04-19 | 1 | -2/+2 | |
| | | | | llvm-svn: 27843 | |||||
* | Allow "let AddedCost = n in" to increase pattern complexity. | Evan Cheng | 2006-04-19 | 1 | -0/+3 | |
| | | | | llvm-svn: 27834 | |||||
* | Add support for dwarf register numbering. | Jim Laskey | 2006-03-24 | 1 | -0/+21 | |
| | | | | llvm-svn: 27080 | |||||
* | Shuffle some includes around | Chris Lattner | 2006-03-24 | 1 | -1/+2 | |
| | | | | llvm-svn: 27073 | |||||
* | Split the valuetypes out of Target.td into ValueTypes.td | Chris Lattner | 2006-03-03 | 1 | -37/+1 | |
| | | | | llvm-svn: 26490 | |||||
* | New type v2f32. | Evan Cheng | 2006-03-01 | 1 | -2/+3 | |
| | | | | llvm-svn: 26435 | |||||
* | Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit | Evan Cheng | 2006-02-20 | 1 | -6/+9 | |
| | | | | | | packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32). llvm-svn: 26294 | |||||
* | Subtarget feature can now set any variable to any value | Evan Cheng | 2006-01-27 | 1 | -5/+5 | |
| | | | | llvm-svn: 25678 | |||||
* | PHI and INLINEASM are now built-in instructions provided by Target.td | Chris Lattner | 2006-01-27 | 1 | -3/+11 | |
| | | | | llvm-svn: 25674 | |||||
* | New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace | Evan Cheng | 2006-01-09 | 1 | -2/+0 | |
| | | | | | | hasInFlag, hasOutFlag. llvm-svn: 25155 | |||||
* | Added field noResults to Instruction. | Evan Cheng | 2005-12-26 | 1 | -0/+1 | |
| | | | | | | | | | | | | Currently tblgen cannot tell which operands in the operand list are results so it assumes the first one is a result. This is bad. Ideally we would fix this by separating results from inputs, e.g. (res R32:$dst), (ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding 'let noResults = 1' is the workaround to tell tblgen that the instruction does not produces a result. It works for now since tblgen does not support instructions which produce multiple results. llvm-svn: 25017 | |||||
* | * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. | Evan Cheng | 2005-12-23 | 1 | -0/+2 | |
| | | | | | | | | * Added a pseudo instruction (for each target) that represent "return void". This is a workaround for lack of optional flag operand (return void is not lowered so it does not have a flag operand.) llvm-svn: 24997 | |||||
* | Added support to specify predicates. | Evan Cheng | 2005-12-14 | 1 | -0/+14 | |
| | | | | llvm-svn: 24715 | |||||
* | * Added instruction property hasCtrlDep for those which r/w control-flow | Evan Cheng | 2005-12-04 | 1 | -0/+1 | |
| | | | | | | | | | | | chains. * Added DAG node property SDNPHasChain for nodes which r/w control-flow chains. * Renamed SDTVT to SDTOther. * Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT. * Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT. llvm-svn: 24586 | |||||
* | Support multiple ValueTypes per RegisterClass, needed for upcoming vector | Nate Begeman | 2005-12-01 | 1 | -3/+6 | |
| | | | | | | work. This change has no effect on generated code. llvm-svn: 24563 | |||||
* | Add the majority of the vector machien value types we expect to support, | Nate Begeman | 2005-11-29 | 1 | -1/+7 | |
| | | | | | | | and make a few changes to the legalization machinery to support more than 16 types. llvm-svn: 24511 | |||||
* | refix typo | Chris Lattner | 2005-11-29 | 1 | -1/+1 | |
| | | | | llvm-svn: 24505 | |||||
* | revert my change for the time being, which broke the build | Chris Lattner | 2005-11-29 | 1 | -1/+1 | |
| | | | | llvm-svn: 24503 | |||||
* | fix a typo :) | Chris Lattner | 2005-11-28 | 1 | -1/+1 | |
| | | | | llvm-svn: 24501 | |||||
* | Capture more operand info, patch by Evan Cheng | Chris Lattner | 2005-11-19 | 1 | -1/+2 | |
| | | | | llvm-svn: 24422 | |||||
* | Also add the new vector value type here, for completeness. | Nate Begeman | 2005-11-18 | 1 | -0/+1 | |
| | | | | llvm-svn: 24405 | |||||
* | Add attribute name and type to SubtargetFeatures. | Jim Laskey | 2005-10-26 | 1 | -1/+9 | |
| | | | | llvm-svn: 24012 | |||||
* | Plugin new subtarget backend into the build. | Jim Laskey | 2005-10-21 | 1 | -1/+1 | |
| | | | | llvm-svn: 23870 | |||||
* | Added InstrSchedClass to each of the PowerPC Instructions. | Jim Laskey | 2005-10-19 | 1 | -5/+8 | |
| | | | | | | | Note that when adding new instructions that you should refer to the table at the bottom of PPCSchedule.td. llvm-svn: 23830 | |||||
* | Push processor descriptions to the top of target and add command line info. | Jim Laskey | 2005-10-19 | 1 | -0/+39 | |
| | | | | llvm-svn: 23820 | |||||
* | Pull DAG ISel generation nodes out of the PowerPC backend to where they | Chris Lattner | 2005-10-10 | 1 | -89/+2 | |
| | | | | | | | can be used by other targets. For those targets that want to use it, have at. :) llvm-svn: 23680 | |||||
* | Add a forward def | Chris Lattner | 2005-10-04 | 1 | -1/+2 | |
| | | | | llvm-svn: 23621 | |||||
* | Now that self referential classes are supported, get rid of a work-around. | Chris Lattner | 2005-09-30 | 1 | -4/+6 | |
| | | | | llvm-svn: 23544 | |||||
* | spell this right | Chris Lattner | 2005-08-26 | 1 | -1/+1 | |
| | | | | llvm-svn: 23099 | |||||
* | Add a flag | Chris Lattner | 2005-08-26 | 1 | -0/+1 | |
| | | | | llvm-svn: 23092 | |||||
* | add an enum value | Chris Lattner | 2005-08-25 | 1 | -2/+3 | |
| | | | | llvm-svn: 23048 |