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path: root/llvm/lib/Target/SystemZ/SystemZSubtarget.h
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* [SystemZ] Add MC support for interlocked-access 1 instructionsRichard Sandiford2013-12-241-0/+4
* Add TargetLowering::prepareVolatileOrAtomicLoadRichard Sandiford2013-12-101-0/+4
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-191-0/+1
* Revert r194865 and r194874.Alexey Samsonov2013-11-181-1/+0
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-151-0/+1
* [SystemZ] Set usaAA to trueRichard Sandiford2013-10-281-0/+3
* [SystemZ] Add FI[EDX]BRARichard Sandiford2013-08-211-0/+4
* [SystemZ] Add RISBLG and RISBHG instruction definitionsRichard Sandiford2013-07-311-0/+4
* [SystemZ] Add STOC and STOCGRichard Sandiford2013-07-251-0/+4
* [SystemZ] Start adding z196 and zEC12 supportRichard Sandiford2013-07-191-0/+6
* [SystemZ] Add back endUlrich Weigand2013-05-061-0/+48
* Remove the SystemZ backend.Dan Gohman2011-10-241-48/+0
* Compute feature bits at time of MCSubtargetInfo initialization.Evan Cheng2011-07-071-1/+2
* Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.Evan Cheng2011-07-011-1/+1
* Rename TargetSubtarget to TargetSubtargetInfo for consistency.Evan Cheng2011-07-011-2/+2
* - Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng2011-07-011-2/+4
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-301-3/+3
* Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar2009-08-021-5/+3
* Implement 'large' PIC modelAnton Korobeynikov2009-07-161-0/+4
* Add z9 and z10 target processors. Mark z10-only instructions as such.Anton Korobeynikov2009-07-161-3/+6
* Unbreak due to mainline api changeAnton Korobeynikov2009-07-161-1/+1
* Let's start another backend :)Anton Korobeynikov2009-07-161-0/+40
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