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path: root/llvm/lib/Target/SystemZ/SystemZScheduleZ13.td
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* [SystemZ] Support vector load/store alignment hintsUlrich Weigand2019-06-191-5/+6
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* [SystemZ] Minor cleanup of SchedModelsJonas Paulsson2018-12-121-10/+10
* [SystemZ] Improve handling of instructions which expand to several groupsJonas Paulsson2018-08-031-25/+35
* [SystemZ] Use tablegen loops in SchedModelsJonas Paulsson2018-07-251-43/+23
* [SystemZ] Reimplent SchedModel IssueWidth and WriteRes/ReadAdvance mappings.Jonas Paulsson2018-07-201-799/+874
* [SystemZ] Commenting (NFC)Jonas Paulsson2018-05-171-3/+5
* [SystemZ] Remove scheduling info from some Pseudo instructions (NFC).Jonas Paulsson2018-04-271-33/+4
* [SystemZ] Use ResourceCycles=30 for FPd unit (NFC).Jonas Paulsson2018-04-121-11/+2
* [SystemZ] Remove FullInstRWOverlapCheck from SchedMachineModels.Jonas Paulsson2018-04-121-5/+3
* [TableGen] When trying to reuse a scheduler class for instructions from an In...Craig Topper2018-03-181-0/+3
* [SystemZ] Minor fixing in SystemZScheduleZ13.tdJonas Paulsson2017-07-111-69/+84
* [SystemZ] Simplify handling of 128-bit multiply/divide instructionUlrich Weigand2017-07-051-2/+2
* [SystemZ] Small cleanups to SystemZScheduleZ13.tdUlrich Weigand2017-07-051-25/+36
* [SystemZ] Add all remaining instructionsUlrich Weigand2017-06-301-29/+157
* [SystemZ] Add missing high-word facility instructionsUlrich Weigand2017-06-301-0/+7
* [SystemZ] Add decimal floating-point instructionsUlrich Weigand2017-05-301-0/+124
* [SystemZ] Add hexadecimal floating-point instructionsUlrich Weigand2017-05-301-0/+108
* [SystemZ] Add miscellaneous instructionsUlrich Weigand2017-05-101-0/+15
* [SystemZ] Add missing arithmetic instructionsUlrich Weigand2017-05-101-5/+20
* [SystemZ] Add decimal integer instructionsUlrich Weigand2017-05-101-0/+22
* [SystemZ] Add crypto instructionsUlrich Weigand2017-05-101-0/+7
* [SystemZ] Add translate/convert instructionsUlrich Weigand2017-05-101-0/+9
* [SystemZ] Add missing memory/string instructionsUlrich Weigand2017-05-101-1/+5
* [SystemZ] Mark vector immediate load instructions with useful flags.Jonas Paulsson2017-01-231-1/+1
* [SystemZ] Support remaining atomic instructionsUlrich Weigand2016-12-021-0/+22
* [SystemZ] Support floating-point control register instructionsUlrich Weigand2016-12-021-0/+11
* [SystemZ] Support execution hint instructionsUlrich Weigand2016-11-281-1/+4
* [SystemZ] Support load-and-trap instructionsUlrich Weigand2016-11-281-0/+6
* [SystemZ] Add remaining branch instructionsUlrich Weigand2016-11-281-3/+6
* [SystemZ] Improve use of conditional instructionsUlrich Weigand2016-11-281-5/+7
* [SystemZ] Support CL(G)T instructionsUlrich Weigand2016-11-111-0/+1
* [SystemZ] Support load-and-zero-rightmost-byte facilityUlrich Weigand2016-11-111-0/+6
* [SystemZ] Use LLGT(R) instructionsUlrich Weigand2016-11-111-2/+2
* [SystemZ] A few fixes in scheduler files.Jonas Paulsson2016-11-091-3/+3
* [SystemZ] Add missing FP extension instructionsUlrich Weigand2016-11-081-6/+6
* [SystemZ] Add program mask and addressing mode instructionsUlrich Weigand2016-11-081-3/+23
* [SystemZ] Model access registers as LLVM registersUlrich Weigand2016-11-081-3/+13
* [SystemZ] Refactor branch and conditional instruction patternsUlrich Weigand2016-11-081-55/+40
* [SystemZ] Correct the SchedModel regarding vector unit / instructions.Jonas Paulsson2016-11-071-41/+43
* [SystemZ] Fixes in SchedModels for older subtargets.Jonas Paulsson2016-11-071-1/+1
* [SystemZ] Rework processor feature definitions and add -mcpu=archX supportUlrich Weigand2016-10-311-0/+2
* [SystemZ] Model 2 VBU units (not 1) in SystemZScheduleZ13.td.Jonas Paulsson2016-10-311-1/+1
* [SystemZ] Post-RA scheduler implementationJonas Paulsson2016-10-201-0/+991
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