| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [SystemZ] Add support for new cpu architecture - arch13 | Ulrich Weigand | 2019-07-12 | 1 | -4/+8 |
| * | CodeGen: Introduce a class for registers | Matt Arsenault | 2019-06-24 | 1 | -3/+3 |
| * | [SystemZ, RegAlloc] Favor 3-address instructions during instruction selection. | Jonas Paulsson | 2019-06-08 | 1 | -1/+47 |
| * | [SystemZ] Model floating-point control register | Ulrich Weigand | 2019-05-13 | 1 | -0/+3 |
| * | [SystemZ] Pass regalloc hints to help Load-and-Test transformations. | Jonas Paulsson | 2019-02-27 | 1 | -15/+38 |
| * | Update the file headers across all of the LLVM projects in the monorepo | Chandler Carruth | 2019-01-19 | 1 | -4/+3 |
| * | [SystemZ] Pass copy-hinted regs first from getRegAllocationHints(). | Jonas Paulsson | 2018-12-13 | 1 | -3/+16 |
| * | [SystemZ] Bugfix in shouldCoalesce() | Jonas Paulsson | 2018-11-08 | 1 | -10/+15 |
| * | [SystemZ] Do not use glue to represent condition code dependencies | Ulrich Weigand | 2018-04-30 | 1 | -0/+8 |
| * | [SystemZ] Add support for anyregcc calling convention | Ulrich Weigand | 2018-03-02 | 1 | -0/+8 |
| * | MachineFunction: Return reference from getFunction(); NFC | Matthias Braun | 2017-12-15 | 1 | -2/+2 |
| * | Rename LiveIntervalAnalysis.h to LiveIntervals.h | Matthias Braun | 2017-12-13 | 1 | -1/+1 |
| * | [SystemZ] Bugfix for handling of subregisters in getRegAllocationHints(). | Jonas Paulsson | 2017-11-20 | 1 | -2/+4 |
| * | [RegAlloc, SystemZ] Increase number of LOCRs by passing "hard" regalloc hints. | Jonas Paulsson | 2017-11-10 | 1 | -0/+81 |
| * | Move TargetFrameLowering.h to CodeGen where it's implemented | David Blaikie | 2017-11-03 | 1 | -1/+1 |
| * | [SystemZ] implement shouldCoalesce() | Jonas Paulsson | 2017-09-29 | 1 | -0/+67 |
| * | Sort the remaining #include lines in include/... and lib/.... | Chandler Carruth | 2017-06-06 | 1 | -1/+1 |
| * | [SystemZ] Model access registers as LLVM registers | Ulrich Weigand | 2016-11-08 | 1 | -0/+5 |
| * | [SystemZ] Support Swift Calling Convention | Bryan Chan | 2016-04-28 | 1 | -0/+8 |
| * | [SystemZ] Use LDE32 instead of LE, when Offset is small. | Jonas Paulsson | 2016-04-12 | 1 | -1/+7 |
| * | Remove redundant TargetFrameLowering::getFrameIndexOffset virtual | James Y Knight | 2015-08-15 | 1 | -2/+2 |
| * | Target RegisterInfo: devirtualize TargetFrameLowering | JF Bastien | 2015-07-10 | 1 | -3/+3 |
| * | Have getCallPreservedMask and getThisCallPreservedMask take a | Eric Christopher | 2015-03-11 | 1 | -1/+2 |
| * | Have MachineFunction cache a pointer to the subtarget to make lookups | Eric Christopher | 2014-08-05 | 1 | -8/+5 |
| * | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher | 2014-08-04 | 1 | -5/+8 |
| * | [SystemZ] Use SystemZCallingConv.td to define callee-saved registers | Richard Sandiford | 2014-07-10 | 1 | -11/+7 |
| * | Remove target machine caching from SystemZInstrInfo and | Eric Christopher | 2014-06-27 | 1 | -4/+7 |
| * | [cleanup] Lift using directives, DEBUG_TYPE definitions, and even some | Chandler Carruth | 2014-04-22 | 1 | -2/+2 |
| * | Make consistent use of MCPhysReg instead of uint16_t throughout the tree. | Craig Topper | 2014-04-04 | 1 | -2/+2 |
| * | [SystemZ] Use "auto" for cast results | Richard Sandiford | 2014-03-06 | 1 | -10/+9 |
| * | [SystemZ] Use upper words of GR64s for codegen | Richard Sandiford | 2013-10-01 | 1 | -0/+2 |
| * | [SystemZ] Rename 32-bit GPR registers | Richard Sandiford | 2013-09-30 | 1 | -2/+2 |
| * | [SystemZ] Clean up register scavenging code | Richard Sandiford | 2013-07-05 | 1 | -26/+0 |
| * | Don't cache the instruction and register info from the TargetMachine, because | Bill Wendling | 2013-06-07 | 1 | -3/+6 |
| * | [SystemZ] Add back end | Ulrich Weigand | 2013-05-06 | 1 | -0/+162 |
| * | Remove the SystemZ backend. | Dan Gohman | 2011-10-24 | 1 | -143/+0 |
| * | Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down | Evan Cheng | 2011-07-18 | 1 | -16/+1 |
| * | Next round of MC refactoring. This patch factor MC table instantiations, MC | Evan Cheng | 2011-07-14 | 1 | -1/+0 |
| * | Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo. | Evan Cheng | 2011-06-28 | 1 | -2/+1 |
| * | Hide more details in tablegen generated MCRegisterInfo ctor function. | Evan Cheng | 2011-06-28 | 1 | -2/+1 |
| * | Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc | Evan Cheng | 2011-06-27 | 1 | -1/+4 |
| * | Starting to refactor Target to separate out code that's needed to fully describe | Evan Cheng | 2011-06-24 | 1 | -4/+4 |
| * | Remove custom allocation orders in SystemZ. | Jakob Stoklund Olesen | 2011-06-15 | 1 | -1/+11 |
| * | Use the dwarf->llvm mapping to print register names in the cfi | Rafael Espindola | 2011-05-30 | 1 | -0/+6 |
| * | Implement SystemZRegisterInfo::getMatchingSuperRegClass to enable cross-class... | Jakob Stoklund Olesen | 2011-05-04 | 1 | -0/+14 |
| * | Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs a... | Anton Korobeynikov | 2011-01-10 | 1 | -3/+3 |
| * | Move more PEI-related hooks to TFI | Anton Korobeynikov | 2010-11-27 | 1 | -35/+0 |
| * | Move some more hooks to TargetFrameInfo | Anton Korobeynikov | 2010-11-20 | 1 | -23/+1 |
| * | Move hasFP() and few related hooks to TargetFrameInfo. | Anton Korobeynikov | 2010-11-18 | 1 | -10/+6 |
| * | First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ou... | Anton Korobeynikov | 2010-11-15 | 1 | -137/+0 |
