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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2014-03-06 11:22:58 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2014-03-06 11:22:58 +0000
commit21f5d68a17540448121c80a4f8aa9e7342d6c58f (patch)
treeaba91558aafdfb3f688a1392decc4c29857cfd72 /llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
parent28c111ec8a8eb00716144933c4c6b2df96a10603 (diff)
downloadbcm5719-llvm-21f5d68a17540448121c80a4f8aa9e7342d6c58f.tar.gz
bcm5719-llvm-21f5d68a17540448121c80a4f8aa9e7342d6c58f.zip
[SystemZ] Use "auto" for cast results
No functional change intended. llvm-svn: 203106
Diffstat (limited to 'llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp19
1 files changed, 9 insertions, 10 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
index b61ae88f733..1ac4e320b30 100644
--- a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
@@ -63,8 +63,7 @@ SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
MachineBasicBlock &MBB = *MI->getParent();
MachineFunction &MF = *MBB.getParent();
- const SystemZInstrInfo &TII =
- *static_cast<const SystemZInstrInfo*>(TM.getInstrInfo());
+ auto *TII = static_cast<const SystemZInstrInfo*>(TM.getInstrInfo());
const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
DebugLoc DL = MI->getDebugLoc();
@@ -84,7 +83,7 @@ SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
// See if the offset is in range, or if an equivalent instruction that
// accepts the offset exists.
unsigned Opcode = MI->getOpcode();
- unsigned OpcodeForOffset = TII.getOpcodeForOffset(Opcode, Offset);
+ unsigned OpcodeForOffset = TII->getOpcodeForOffset(Opcode, Offset);
if (OpcodeForOffset)
MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
else {
@@ -94,7 +93,7 @@ SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
int64_t Mask = 0xffff;
do {
Offset = OldOffset & Mask;
- OpcodeForOffset = TII.getOpcodeForOffset(Opcode, Offset);
+ OpcodeForOffset = TII->getOpcodeForOffset(Opcode, Offset);
Mask >>= 1;
assert(Mask && "One offset must be OK");
} while (!OpcodeForOffset);
@@ -107,21 +106,21 @@ SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
&& MI->getOperand(FIOperandNum + 2).getReg() == 0) {
// Load the offset into the scratch register and use it as an index.
// The scratch register then dies here.
- TII.loadImmediate(MBB, MI, ScratchReg, HighOffset);
+ TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
MI->getOperand(FIOperandNum + 2).ChangeToRegister(ScratchReg,
false, false, true);
} else {
// Load the anchor address into a scratch register.
- unsigned LAOpcode = TII.getOpcodeForOffset(SystemZ::LA, HighOffset);
+ unsigned LAOpcode = TII->getOpcodeForOffset(SystemZ::LA, HighOffset);
if (LAOpcode)
- BuildMI(MBB, MI, DL, TII.get(LAOpcode),ScratchReg)
+ BuildMI(MBB, MI, DL, TII->get(LAOpcode),ScratchReg)
.addReg(BasePtr).addImm(HighOffset).addReg(0);
else {
// Load the high offset into the scratch register and use it as
// an index.
- TII.loadImmediate(MBB, MI, ScratchReg, HighOffset);
- BuildMI(MBB, MI, DL, TII.get(SystemZ::AGR),ScratchReg)
+ TII->loadImmediate(MBB, MI, ScratchReg, HighOffset);
+ BuildMI(MBB, MI, DL, TII->get(SystemZ::AGR),ScratchReg)
.addReg(ScratchReg, RegState::Kill).addReg(BasePtr);
}
@@ -130,7 +129,7 @@ SystemZRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
false, false, true);
}
}
- MI->setDesc(TII.get(OpcodeForOffset));
+ MI->setDesc(TII->get(OpcodeForOffset));
MI->getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
}
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