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path: root/llvm/lib/Target/SystemZ/SystemZInstrInfo.h
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* [SystemZ] Bugfix and improve the handling of CC values.Jonas Paulsson2019-12-201-1/+2
* [SystemZ] Improve verification of MachineOperands.Jonas Paulsson2019-12-161-0/+4
* Use MCRegister in copyPhysRegMatt Arsenault2019-11-111-1/+1
* Remove the AliasAnalysis argument in function areMemAccessesTriviallyDisjointChangpeng Fang2019-09-261-2/+1
* [SystemZ] Merge the SystemZExpandPseudo pass into SystemZPostRewrite.Jonas Paulsson2019-09-161-4/+0
* [SystemZ] Recognize INLINEASM_BR in backendJonas Paulsson2019-09-051-6/+16
* [SystemZ] Add support for new cpu architecture - arch13Ulrich Weigand2019-07-121-0/+2
* [SystemZ, RegAlloc] Favor 3-address instructions during instruction selection.Jonas Paulsson2019-06-081-1/+7
* [CodeGen] Add "const" to MachineInstr::mayAliasBjorn Pettersson2019-04-191-1/+2
* [SystemZ] Do not return INT_MIN from strcmp/memcmpUlrich Weigand2019-02-061-3/+0
* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-1/+1
* [SystemZ] Don't drop any operands in expandZExtPseudo()Jonas Paulsson2017-03-221-4/+8
* Make TargetInstrInfo::isPredicable take a const reference, NFCKrzysztof Parzyszek2017-03-031-1/+1
* [SystemZ] Fix some Clang-tidy modernize and Include What You Use warnings; ot...Eugene Zelenko2017-01-241-3/+15
* [SystemZ] Proper handling of undef flag while expanding pseudo.Jonas Paulsson2017-01-181-1/+2
* [SystemZ] Support load-and-trap instructionsUlrich Weigand2016-11-281-0/+4
* [SystemZ] Improve use of conditional instructionsUlrich Weigand2016-11-281-1/+29
* [SystemZ] Post-RA scheduler implementationJonas Paulsson2016-10-201-0/+8
* Finish renaming remaining analyzeBranch functionsMatt Arsenault2016-09-141-2/+2
* Make analyzeBranch family of instruction names consistentMatt Arsenault2016-09-141-1/+1
* AArch64: Use TTI branch functions in branch relaxationMatt Arsenault2016-09-141-2/+4
* TargetInstrInfo: add virtual function getInstSizeInBytesSjoerd Meijer2016-07-291-1/+1
* Rename AnalyzeBranch* to analyzeBranch*.Jacques Pienaar2016-07-151-1/+1
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-301-24/+23
* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-3/+3
* [SystemZ] Support Compare and TrapsZhan Jun Liau2016-06-101-9/+12
* [foldMemoryOperand()] Pass LiveIntervals to enable liveness check.Jonas Paulsson2016-05-101-2/+4
* [SystemZ] [SSP] Add support for LOAD_STACK_GUARD.Marcin Koscielnicki2016-04-241-0/+1
* [SystemZ] Support conditional indirect sibling calls via BCRUlrich Weigand2016-04-111-1/+4
* [SystemZ] Implement conditional returnsUlrich Weigand2016-04-071-0/+13
* CodeGen: TII: Take MachineInstr& in predicate API, NFCDuncan P. N. Exon Smith2016-02-231-2/+2
* Pass BranchProbability/BlockMass by value instead of const& as they are small...Cong Hou2015-09-101-2/+2
* [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC.Ahmed Bougacha2015-06-111-4/+2
* [InstrInfo] Refactor foldOperandImpl to thread through InsertPt. NFCKeno Fischer2015-06-081-0/+2
* ArrayRefize memory operand folding. NFC.Benjamin Kramer2015-02-281-4/+4
* [SystemZ] Support all TLS access models - CodeGen partUlrich Weigand2015-02-181-2/+5
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-131-2/+2
* Remove target machine caching from SystemZInstrInfo andEric Christopher2014-06-271-2/+3
* [C++] Use 'nullptr'.Craig Topper2014-04-281-1/+1
* [SystemZ] Remove "virtual" from override methodsRichard Sandiford2014-03-061-64/+52
* [SystemZ] Update namespace formatting to match current guidelinesRichard Sandiford2014-03-061-82/+82
* Switch all uses of LLVM_OVERRIDE to just use 'override' directly.Craig Topper2014-03-021-30/+27
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-191-0/+1
* Revert r194865 and r194874.Alexey Samsonov2013-11-181-1/+0
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-151-0/+1
* [SystemZ] Add immediate addition involving high wordsRichard Sandiford2013-10-011-0/+2
* [SystemZ] Add patterns to load a constant into a high word (IIHF)Richard Sandiford2013-10-011-0/+2
* [SystemZ] Add register zero extensions involving at least one high wordRichard Sandiford2013-10-011-0/+2
* [SystemZ] Use upper words of GR64s for codegenRichard Sandiford2013-10-011-1/+6
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