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path: root/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
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* [SystemZ] Use preferred 16-byte function alignmentUlrich Weigand2018-04-241-0/+2
* [SystemZ] Bugfix of CC liveness in emitMemMemWrapper (CLC).Jonas Paulsson2018-03-191-0/+4
* [SystemZ] computeKnownBitsForTargetNode() / ComputeNumSignBitsForTargetNode()Jonas Paulsson2018-03-171-19/+289
* TargetMachine: Add address space to getPointerSizeMatt Arsenault2018-03-141-1/+1
* [SystemZ] Allow LRV/STRV with volatile memory accessesUlrich Weigand2018-03-021-6/+1
* [SystemZ] Support stackmaps and patchpointsUlrich Weigand2018-03-021-0/+11
* [SystemZ] Support vector registers in inline asmUlrich Weigand2018-03-021-8/+35
* [TLS] use emulated TLS if the target supports only this modeChih-Hung Hsieh2018-02-281-1/+1
* [SystemZ] Check the bitwidth before calling isInt/isUInt.Jonas Paulsson2018-01-311-1/+2
* [SystemZ] Fix bootstrap failure due to invalid DAG loopUlrich Weigand2018-01-221-2/+21
* [SystemZ] Directly use CC result of compare-and-swapUlrich Weigand2018-01-191-0/+124
* [SystemZ] Rework IPM sequence generationUlrich Weigand2018-01-191-122/+58
* [SystemZ] Implement computeKnownBitsForTargetNodeUlrich Weigand2018-01-191-0/+24
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-3/+3
* [SystemZ] Validate shifted compare value in adjustForTestUnderMaskUlrich Weigand2017-12-051-0/+2
* [SystemZ] Bugfix in adjustSubwordCmp.Jonas Paulsson2017-11-301-4/+11
* [SystemZ] Fix fall-out from r314428Ulrich Weigand2017-09-281-0/+6
* [SystemZ] Custom-expand ATOMIC_CMP_AND_SWAP_WITH_SUCCESSUlrich Weigand2017-09-281-17/+45
* [SystemZ] Fix truncstore + bswap codegen bugUlrich Weigand2017-09-191-1/+2
* Sink some IntrinsicInst.h and Intrinsics.h out of llvm/includeReid Kleckner2017-09-071-0/+1
* [LSR / TTI / SystemZ] Eliminate TargetTransformInfo::isFoldableMemAccess()Jonas Paulsson2017-08-091-15/+9
* [SystemZ] Add support for 128-bit atomic load/store/cmpxchgUlrich Weigand2017-08-041-0/+119
* [SystemZ] Eliminate unnecessary serialization operationsUlrich Weigand2017-08-041-9/+9
* [SystemZ, LoopStrengthReduce]Jonas Paulsson2017-07-211-38/+110
* [SystemZ] Add support for IBM z14 processor (3/3)Ulrich Weigand2017-07-171-3/+25
* [SystemZ] Add support for IBM z14 processor (2/3)Ulrich Weigand2017-07-171-8/+43
* [SystemZ] Add support for IBM z14 processor (1/3)Ulrich Weigand2017-07-171-1/+24
* Enhance synchscope representationKonstantin Zhuravlyov2017-07-111-2/+2
* [SystemZ] Fix -Wimplicit-fallthrough warnings. NFCI.Simon Pilgrim2017-07-071-0/+2
* [SystemZ] Simplify handling of 128-bit multiply/divide instructionUlrich Weigand2017-07-051-55/+36
* [SystemZ] Add a check against zero before calling getTestUnderMaskCond()Jonas Paulsson2017-06-261-0/+2
* [SystemZ] Remove unnecessary serialization before volatile loadsUlrich Weigand2017-06-231-8/+5
* [SystemZ] Propagate MachineMemOperandsJonas Paulsson2017-06-071-6/+19
* [SystemZ] Improve buildVector() in SystemZISelLowering.cpp.Jonas Paulsson2017-05-291-19/+41
* [SystemZ] Implement getRepRegClassFor()Jonas Paulsson2017-05-101-0/+9
* Add extra operand to CALLSEQ_START to keep frame part set up previouslySerge Pavlov2017-05-091-3/+1
* [SelectionDAG] Use KnownBits struct in DAG's computeKnownBits and simplifyDem...Craig Topper2017-04-281-9/+10
* DAG: Make mayBeEmittedAsTailCall parameter constMatt Arsenault2017-04-181-1/+1
* [SystemZ] TargetTransformInfo cost functions implemented.Jonas Paulsson2017-04-121-0/+4
* [SystemZ] Check for presence of vector support in SystemZISelLoweringJonas Paulsson2017-04-071-2/+5
* [SystemZ] Remove confusing comment in combineEXTRACT_VECTOR_ELT()Jonas Paulsson2017-04-071-2/+0
* [SystemZ] Prevent Merging Bitcast with non-normal loadsNirav Dave2017-04-051-2/+3
* [SystemZ] Skip DAGCombining of vector node for older subtargets.Jonas Paulsson2017-03-311-0/+6
* [SystemZ] Add check VT.isSimple() in canTreateAsByteVector()Jonas Paulsson2017-03-071-1/+1
* [SystemZ] Add comment for ISD::FP_TO_UINT expansion.Jonas Paulsson2017-02-021-0/+3
* [SystemZ] Gracefully fail in GeneralShuffle::add() instead of assertion.Jonas Paulsson2017-01-241-12/+22
* [CodeGen] Rename MachineInstrBuilder::addOperand. NFCDiana Picus2017-01-131-19/+37
* [SystemZ] Improve isFoldableMemAccessOffset().Jonas Paulsson2017-01-111-2/+20
* [SystemZ] Improve use of conditional instructionsUlrich Weigand2016-11-281-3/+21
* [SystemZ] Model access registers as LLVM registersUlrich Weigand2016-11-081-5/+3
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