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* remove attribution from lib Makefiles.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45415
* Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always ↵Evan Cheng2007-12-121-0/+3
| | | | | | re-materializable and they should not be spilled. llvm-svn: 44960
* Add a argument to storeRegToStackSlot and storeRegToAddr to specify whetherEvan Cheng2007-12-052-7/+8
| | | | | | the stored register is killed. llvm-svn: 44600
* Remove redundant foldMemoryOperand variants and other code clean up.Evan Cheng2007-12-022-16/+7
| | | | llvm-svn: 44517
* Allow some reloads to be folded in multi-use cases. Specifically testl r, r ↵Evan Cheng2007-12-011-0/+12
| | | | | | -> cmpl [mem], 0. llvm-svn: 44479
* Add parameter to getDwarfRegNum to permit targetsDale Johannesen2007-11-132-2/+2
| | | | | | | | to use different mappings for EH and debug info; no functional change yet. Fix warning in X86CodeEmitter. llvm-svn: 44056
* Unifacalize the CALLSEQ{START,END} stuff.Bill Wendling2007-11-131-5/+5
| | | | llvm-svn: 44045
* Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stackBill Wendling2007-11-132-10/+14
| | | | | | | | | | | adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If not, then there is the potential for the stack to be changed while the stack's being used by another instruction (like a call). This can only result in tears... llvm-svn: 44037
* Use TableGen to emit information for dwarf register numbers. Anton Korobeynikov2007-11-113-80/+87
| | | | | | | | This makes DwarfRegNum to accept list of numbers instead. Added three different "flavours", but only slightly tested on x86-32/linux. Please check another subtargets if possible, llvm-svn: 43997
* Eliminate the remaining uses of getTypeSize. ThisDuncan Sands2007-11-051-2/+2
| | | | | | | | | | | | | | should only effect x86 when using long double. Now 12/16 bytes are output for long double globals (the exact amount depends on the alignment). This brings globals in line with the rest of LLVM: the space reserved for an object is now always the ABI size. One tricky point is that only 10 bytes should be output for long double if it is a field in a packed struct, which is the reason for the additional argument to EmitGlobalConstant. llvm-svn: 43688
* - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but ↵Evan Cheng2007-10-182-4/+4
| | | | | | | | only returns the opcode of the instruction post unfolding. - Fix some copy+paste bugs. llvm-svn: 43153
* Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister ↵Evan Cheng2007-10-182-8/+8
| | | | | | public interface. llvm-svn: 43150
* Revert 42908 for now.Evan Cheng2007-10-141-2/+2
| | | | llvm-svn: 42960
* Change the names used for internal labels to use the currentDan Gohman2007-10-121-2/+2
| | | | | | | | | function symbol name instead of a codegen-assigned function number. Thanks Evan! :-) llvm-svn: 42908
* Set ISD::FPOW to Expand.Dan Gohman2007-10-111-0/+2
| | | | llvm-svn: 42881
* Fix CodeGen/Generic/BasicInstrs.llx on sparc by marking divremChris Lattner2007-10-101-1/+3
| | | | | | illegal. Thanks to gabor for pointing this out! llvm-svn: 42832
* - Added a few target hooks to generate load / store instructions from / to anyEvan Cheng2007-10-052-0/+65
| | | | | | | | address (not just from / to frameindexes). - Added target hooks to unfold load / store instructions / SDNodes into separate load, data processing, store instructions / SDNodes. llvm-svn: 42621
* Allow copyRegToReg to emit cross register classes copies.Evan Cheng2007-09-262-5/+12
| | | | | | Tested with "make check"! llvm-svn: 42346
* More explicit keywords.Dan Gohman2007-09-251-1/+1
| | | | llvm-svn: 42316
* Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.Evan Cheng2007-09-111-2/+4
| | | | llvm-svn: 41863
* Fold the adjust_trampoline intrinsic intoDuncan Sands2007-09-111-2/+0
| | | | | | | init_trampoline. There is now only one trampoline intrinsic. llvm-svn: 41841
* Add lengthof and endof templates that hide a lot of sizeof computations.Owen Anderson2007-09-071-1/+2
| | | | | | Patch by Sterling Stein! llvm-svn: 41758
* Add a variant of foldMemoryOperand to fold any load / store, not just load / ↵Evan Cheng2007-08-301-0/+6
| | | | | | store from / to stack slots. llvm-svn: 41597
* long double patch 2 of N. Handle it in TargetData.Dale Johannesen2007-08-031-1/+1
| | | | | | | (I've tried to get the info right for all targets, but I'm not expert on all of them - check yours.) llvm-svn: 40792
* Support for trampolines, except for X86 codegen which isDuncan Sands2007-07-271-1/+3
| | | | | | still under discussion. llvm-svn: 40549
* Don't ignore the return value of AsmPrinter::doInitialization andDan Gohman2007-07-251-2/+1
| | | | | | AsmPrinter::doFinalization. llvm-svn: 40487
* No more noResults.Evan Cheng2007-07-211-4/+2
| | | | llvm-svn: 40132
* Change instruction description to split OperandList into OutOperandList andEvan Cheng2007-07-192-118/+119
| | | | | | | | | | | | | | | InOperandList. This gives one piece of important information: # of results produced by an instruction. An example of the change: def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; => def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; llvm-svn: 40033
* Long live the exception handling!Anton Korobeynikov2007-07-142-4/+6
| | | | | | | | | | | | | | | This patch fills the last necessary bits to enable exceptions handling in LLVM. Currently only on x86-32/linux. In fact, this patch adds necessary intrinsics (and their lowering) which represent really weird target-specific gcc builtins used inside unwinder. After corresponding llvm-gcc patch will land (easy) exceptions should be more or less workable. However, exceptions handling support should not be thought as 'finished': I expect many small and not so small glitches everywhere. llvm-svn: 39855
* Fix for PR1540: Specify F0, F1 are sub-registers of D0, etc.Evan Cheng2007-07-131-2/+2
| | | | llvm-svn: 39843
* Fix CodeGen/Generic/print-arith-fp.ll on sparc (PR1551)Chris Lattner2007-07-131-0/+2
| | | | llvm-svn: 39813
* Assert when TLS is not implemented.Lauro Ramos Venancio2007-07-111-0/+3
| | | | llvm-svn: 39737
* Fix an oversight: for modules with no other identifying target info,Chris Lattner2007-07-111-0/+4
| | | | | | the sparc backend should be preferred when running on sparcs. llvm-svn: 39142
* The various "getModuleMatchQuality" implementations should returnChris Lattner2007-07-091-0/+3
| | | | | | zero if they see a target triple they don't understand. llvm-svn: 38463
* Convert .cvsignore filesJohn Criswell2007-06-291-1/+0
| | | | llvm-svn: 37801
* Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits fromDan Gohman2007-06-221-2/+6
| | | | | | | | | TargetLowering to SelectionDAG so that they have more convenient access to the current DAG, in preparation for the ValueType routines being changed from standalone functions to members of SelectionDAG for the pre-legalize vector type changes. llvm-svn: 37704
* RemoveBranch() and InsertBranch() now returns number of instructions deleted ↵Evan Cheng2007-05-182-6/+8
| | | | | | / inserted. llvm-svn: 37193
* Drop 'const'Devang Patel2007-05-032-4/+4
| | | | llvm-svn: 36662
* Use 'static const char' instead of 'static const int'.Devang Patel2007-05-022-4/+4
| | | | | | | Due to darwin gcc bug, one version of darwin linker coalesces static const int, which defauts PassID based pass identification. llvm-svn: 36652
* Do not use typeinfo to identify pass in pass manager.Devang Patel2007-05-012-3/+9
| | | | llvm-svn: 36632
* eliminateFrameIndex() change.Evan Cheng2007-05-012-2/+4
| | | | llvm-svn: 36626
* Added MRegisterInfo hook to re-materialize an instruction.Evan Cheng2007-03-202-0/+12
| | | | llvm-svn: 35205
* Refactoring of formal parameter flags. Enable properly use ofAnton Korobeynikov2007-03-071-2/+4
| | | | | | zext/sext/aext stuff. llvm-svn: 35008
* PEI now passes a RegScavenger ptr to eliminateFrameIndex.Evan Cheng2007-02-282-3/+4
| | | | llvm-svn: 34707
* By default, spills kills the register being stored.Evan Cheng2007-02-231-3/+3
| | | | llvm-svn: 34515
* Simplify lowering and selection of exception ops.Jim Laskey2007-02-221-3/+0
| | | | llvm-svn: 34488
* Support to provide exception and selector registers.Jim Laskey2007-02-213-0/+17
| | | | llvm-svn: 34482
* Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.Evan Cheng2007-02-192-0/+19
| | | | llvm-svn: 34428
* For PR1207:Reid Spencer2007-02-192-19/+0
| | | | | | | Revert patches that caused the problem. Evan, please investigate and reapply when you've discovered the problem. llvm-svn: 34399
* Added getReservedRegs().Evan Cheng2007-02-172-0/+19
| | | | llvm-svn: 34376
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