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authorEvan Cheng <evan.cheng@apple.com>2007-10-18 21:29:24 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-10-18 21:29:24 +0000
commitaa9a225699367c6b0110379db47821458bdd4789 (patch)
treef8d30c99eddaa3950ae174d4ce6f2dbcb720b214 /llvm/lib/Target/Sparc
parent0d466153b94f9f16c98c829fa16f138d13476e96 (diff)
downloadbcm5719-llvm-aa9a225699367c6b0110379db47821458bdd4789.tar.gz
bcm5719-llvm-aa9a225699367c6b0110379db47821458bdd4789.zip
Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
llvm-svn: 43150
Diffstat (limited to 'llvm/lib/Target/Sparc')
-rw-r--r--llvm/lib/Target/Sparc/SparcRegisterInfo.cpp8
-rw-r--r--llvm/lib/Target/Sparc/SparcRegisterInfo.h8
2 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp b/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
index 7129f43712d..3055bf9dfe9 100644
--- a/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
@@ -49,9 +49,9 @@ storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
}
void SparcRegisterInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
- SmallVector<MachineOperand,4> Addr,
+ SmallVectorImpl<MachineOperand> Addr,
const TargetRegisterClass *RC,
- SmallVector<MachineInstr*, 4> &NewMIs) const {
+ SmallVectorImpl<MachineInstr*> &NewMIs) const {
unsigned Opc = 0;
if (RC == SP::IntRegsRegisterClass)
Opc = SP::STri;
@@ -91,9 +91,9 @@ loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
}
void SparcRegisterInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
- SmallVector<MachineOperand,4> Addr,
+ SmallVectorImpl<MachineOperand> Addr,
const TargetRegisterClass *RC,
- SmallVector<MachineInstr*, 4> &NewMIs) const {
+ SmallVectorImpl<MachineInstr*> &NewMIs) const {
unsigned Opc = 0;
if (RC == SP::IntRegsRegisterClass)
Opc = SP::LDri;
diff --git a/llvm/lib/Target/Sparc/SparcRegisterInfo.h b/llvm/lib/Target/Sparc/SparcRegisterInfo.h
index 39cf6160d6c..15a624f2634 100644
--- a/llvm/lib/Target/Sparc/SparcRegisterInfo.h
+++ b/llvm/lib/Target/Sparc/SparcRegisterInfo.h
@@ -36,9 +36,9 @@ struct SparcRegisterInfo : public SparcGenRegisterInfo {
const TargetRegisterClass *RC) const;
void storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
- SmallVector<MachineOperand,4> Addr,
+ SmallVectorImpl<MachineOperand> Addr,
const TargetRegisterClass *RC,
- SmallVector<MachineInstr*, 4> &NewMIs) const;
+ SmallVectorImpl<MachineInstr*> &NewMIs) const;
void loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
@@ -46,9 +46,9 @@ struct SparcRegisterInfo : public SparcGenRegisterInfo {
const TargetRegisterClass *RC) const;
void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
- SmallVector<MachineOperand,4> Addr,
+ SmallVectorImpl<MachineOperand> Addr,
const TargetRegisterClass *RC,
- SmallVector<MachineInstr*, 4> &NewMIs) const;
+ SmallVectorImpl<MachineInstr*> &NewMIs) const;
void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned SrcReg,
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